Patents by Inventor William K. Laird

William K. Laird has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10116129
    Abstract: An EOS event detection circuit coupled to a power supply via a supply voltage rail and comprising a plurality of sub-circuits coupled to the supply voltage rail, each sub-circuit comprising a first transistor, a Zener diode coupled between the supply voltage rail and a first terminal of the first transistor, and a fusible element coupled between a second terminal of the first transistor and the supply voltage rail, wherein the first transistor is configured to cause the fusible element to open when an EOS event occurring on the supply voltage rail exceeds a reverse breakdown voltage of the Zener diode, and wherein the Zener diode in each sub-circuit has a different reverse breakdown voltage.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: October 30, 2018
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: William K. Laird, Joseph J. Crowfoot
  • Patent number: 9910075
    Abstract: An overvoltage detection circuit coupled to an external power supply via a voltage supply line and comprising a transistor comprising first terminal coupled to the voltage supply line, second terminal coupled to the first terminal via a resistor, the second terminal coupled to a parasitic capacitor, the transistor configured to receive an overvoltage spike from the external power supply on the first terminal, and provide an output voltage on third terminal of the transistor to indicate detection of the overvoltage spike when it has a duration less than a time constant based on the resistor and the parasitic capacitor and amplitude that exceeds a threshold voltage of the transistor. The overvoltage detection circuit further comprises a monitor circuit configured to receive the output voltage from the transistor and provide a digital signal providing a notification of the detected overvoltage spike from the external power supply on the voltage supply line.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: March 6, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: William K. Laird, Joseph J. Crowfoot
  • Patent number: 9823294
    Abstract: A negative voltage testing including a monitoring and triggering circuit coupled to a supply voltage rail of a device under test (DUT) and a switching circuit coupled to the monitoring and triggering circuit. The monitoring and triggering circuit is configured to cause the switching circuit to provide a first negative voltage to the supply voltage rail when a supply voltage on the supply voltage rail decays below a predetermined level during a first test of the DUT.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: November 21, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: Christopher Aiello, Ryan P. Mayo, William K. Laird, John R. Agness
  • Publication number: 20170292979
    Abstract: An overvoltage detection circuit coupled to an external power supply via a voltage supply line and comprising a transistor comprising first terminal coupled to the voltage supply line, second terminal coupled to the first terminal via a resistor, the second terminal coupled to a parasitic capacitor, the transistor configured to receive an overvoltage spike from the external power supply on the first terminal, and provide an output voltage on third terminal of the transistor to indicate detection of the overvoltage spike when it has a duration less than a time constant based on the resistor and the parasitic capacitor and amplitude that exceeds a threshold voltage of the transistor. The overvoltage detection circuit further comprises a monitor circuit configured to receive the output voltage from the transistor and provide a digital signal providing a notification of the detected overvoltage spike from the external power supply on the voltage supply line.
    Type: Application
    Filed: April 11, 2016
    Publication date: October 12, 2017
    Inventors: WILLIAM K. LAIRD, JOSEPH J. CROWFOOT
  • Publication number: 20170005573
    Abstract: A power system includes a first charge pump configured to supply power, and control circuitry coupled to the first charge pump. The control circuitry is operable to receive a signal indicating whether a second change pump is turning on. If the first charge pump is about to be turned on and the signal indicates that the second charge pump is turning on, the control circuitry is operable to prevent an output, of first charge pump from substantially aligning with an output of the second charge pump.
    Type: Application
    Filed: September 7, 2016
    Publication date: January 5, 2017
    Inventors: WILLIAM K. LAIRD, JOHN R. AGNESS, HENRY S. UNG
  • Patent number: 9471072
    Abstract: A regulator circuit includes: a current detector configured to sense a load current and convert the sensed load current to a DC current sense signal; and an adjustment circuit configured to adjust an output voltage within predetermined upper and lower voltage limits based on the DC current sense signal.
    Type: Grant
    Filed: July 2, 2014
    Date of Patent: October 18, 2016
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC
    Inventors: William K. Laird, John R. Agness
  • Patent number: 9443431
    Abstract: A power system is disclosed including a plurality of power circuits, each power circuit providing an independent power output and including a high-side driver coupled to a high-side switch and a low-side drive coupled to a low-side switch, and control circuitry coupled to each of the power circuits. The control circuitry is operable to detect a present state of each high-side and low-side switch, and prevent two or more of the high-side switches from substantially concurrently switching from a first state to a second state, or two or more of the high-side switches and one or more of the low-side switches from substantially concurrently switching from a third state to a fourth state, or two or more of the low-side switches from substantially concurrently switching from the third state to the fourth state.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: September 13, 2016
    Assignee: Western Digital Technologies, Inc.
    Inventors: William K. Laird, John R. Agness, Henry S. Ung
  • Publication number: 20160124444
    Abstract: An electrical circuit includes: a controlled switch; one or more temperature sensors in thermal contact with the controlled switch; and a control unit configured to: receive a temperature signal from the one or more temperature sensors; compare the received temperature signal to a predetermined threshold; and in response to the received temperature signal exceeding the predetermined threshold, render the controlled switch inoperative.
    Type: Application
    Filed: January 12, 2016
    Publication date: May 5, 2016
    Inventors: JOHN R. AGNESS, WILLIAM K. LAIRD
  • Patent number: 9304560
    Abstract: A data storage device (DSD) includes a power supply from a host and a charge storage element. A current transient is detected on the power supply from the host and it is determined whether the current transient exceeds a current threshold. When the current transient exceeds the current threshold, power is drawn from the charge storage element to reduce power drawn from the host.
    Type: Grant
    Filed: August 2, 2013
    Date of Patent: April 5, 2016
    Assignee: Western Digital Technologies, Inc.
    Inventors: William K. Laird, John R. Agness, Henry S. Ung, Ryan P. Mayo
  • Patent number: 9251839
    Abstract: A data storage device coupled to a host power supply is disclosed and includes a spindle motor and Voice Coil Motor (VCM) circuitry, a power device coupled to the host power supply via a first host supply line and coupled to the spindle motor and VCM circuitry, wherein the power device comprises a first voltage rail, a first isolation circuit, and control circuitry, wherein the power device receives a first supply voltage on the first voltage rail via the first host supply line and provides the first supply voltage to the spindle motor and VCM circuitry via the first isolation circuit, and wherein the control circuitry is operable to monitor the first voltage rail for an overvoltage event and, when the overvoltage event is detected, control the first isolation circuit to disconnect the spindle motor and VCM circuitry from the first voltage rail.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: February 2, 2016
    Assignee: Western Digital Technologies, Inc.
    Inventors: John R. Agness, William K. Laird, Henry S. Ung, Andre Pratama, Ronald G. Gayler
  • Patent number: 9245540
    Abstract: An electrical circuit includes: a controlled switch; one or more temperature sensors in thermal contact with the controlled switch; and a control unit configured to: receive a temperature signal from the one or more temperature sensors; compare the received temperature signal to a predetermined threshold; and in response to the received temperature signal exceeding the predetermined threshold, render the controlled switch inoperative.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: January 26, 2016
    Assignee: Western Digital Technologies, Inc.
    Inventors: John R. Agness, William K. Laird
  • Patent number: 9143005
    Abstract: A backup energy storage module is disclosed including a plurality of charge storage elements, each charge storage element operable to be charged to a backup voltage. The backup energy storage module further includes control circuitry operable to monitor a supply voltage that provides power to a load, determine when the supply voltage falls below a threshold level, select a first charge storage element to provide power to the load, determine when the backup voltage on the first charge storage element falls to a reference level, and select a second charge storage element to provide power to the load if the supply voltage remains below the threshold level.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: September 22, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: William K. Laird, John R. Agness, Henry S. Ung
  • Publication number: 20140380067
    Abstract: A data storage device (DSD) includes a power supply from a host and a charge storage element. A current transient is detected on the power supply from the host and it is determined whether the current transient exceeds a current threshold. When the current transient exceeds the current threshold, power is drawn from the charge storage element to reduce power drawn from the host.
    Type: Application
    Filed: August 2, 2013
    Publication date: December 25, 2014
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: WILLIAM K. LAIRD, JOHN R. AGNESS, HENRY S. UNG, RYAN P. MAYO
  • Patent number: 8724422
    Abstract: A data storage system is disclosed including a data storage device having a controller coupled to non-volatile semiconductor memory and a power device having a common power rail and first, second, and third spindle phase switching elements, the common power rail receiving an input voltage and providing power to the data storage device and the power device. The data storage system further includes an inductor coupled between outputs of the first and second spindle phase switching elements, and a charge storage element coupled between the second spindle phase switching element output and ground. The power device further includes control circuitry that controls the first and second spindle phase switching elements to generate boost output voltage for charging the charge storage element during a boost mode, the boost output voltage enabling the controller to perform a data operation in an event of an interruption of power to the data storage system.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: May 13, 2014
    Assignee: Western Digital Technologies, Inc.
    Inventors: John R. Agness, William K. Laird, Henry S. Ung