Abstract: A 3-D LADAR imaging system incorporating stacked microelectronic layers is provided. A light source is imaged upon a target through beam shaping optics. Photons reflected from the target are collected and imaged upon a detector array though collection optics. The detector array signals are fed into a multilayer processing module wherein each layer includes detector signal processing circuitry. The detector array signals are amplified, compared to a user-defined threshold, digitized and fed into a high speed FIFO range bin. Dependant on the value of the digit contained in the bins in the register, and the digit's bin location, the time of a photon reflection from a target surface can be determined. A To trigger signal defines the reflection time represented by each bin location by resetting appropriate circuitry to begin processing.

Abstract: A 3-D LADAR imaging system incorporating stacked microelectronic layers is provided. A light source is imaged upon a target through beam shaping optics. Photons reflected from the target are collected and imaged upon a detector array though collection optics. The detector array signals are fed into a multilayer processing module wherein each layer includes detector signal processing circuitry. The detector array signals are amplified, compared to a user-defined threshold, digitized and fed into a high speed FIFO range bin. Dependant on the value of the digit contained in the bins in the register, and the digit's bin location, the time of a photon reflection from a target surface can be determined. A T0 trigger signal defines the reflection time represented by each bin location by resetting appropriate circuitry to begin processing.

Abstract: A semiconductor chip for forming an electronic image in a digital camera includes an offset canceling column buffer for use with active pixel sensors having a small electrical buffer amplifier within each pixel The active pixel sensors are arranged on a semiconductor chip with simultaneous access and reset lines. Each active pixel sensor includes an source follower current amplifier, which introduces small variations in offset voltage, causing pattern noise to be introduced into the output signal of the sensed image. A method and apparatus is disclosed for addressing an array of active pixel sensors in a sequence coordinated with a column buffer for canceling pattern noise. To cancel pattern noise, the current row N in the APS cell array is accessed and sampled. Next, the following row N+1 is accessed thereby resetting the current row. Finally, the previous row N in the APS cell array is accessed a second time and sampled.

Abstract: A self-adjusting adaptive input circuit with minimal excess noise and a linear charge-handling capacity exceeding 109 electrons to enable high-quality imaging at long wavelength infrared backgrounds and video frame rates is disclosed. An integration capacitor stores a charge produced from a photodetector. A self-adjusting current source skims a current during integration on the integration capacitor. The gate voltage of a skimming transistor is set via a programming transistor in order to set the skim level.

Abstract: An ultra-low noise, high gain interface circuit for single-photon readout of known photodetectors from the x-ray to long IR bands at video frame rates. The detector current modulate's a load FET's gate-to-source voltage, which in turn modulates the gate-to-source voltage of a gain FET thereby producing a signal current that is an amplified facsimile of the detector current. The load FET's gate-to-source voltage is connected in the negative feedback loop of a low noise, high gain amplifier. This effectively reduces the resistance seen by the photodetector by the gain of the amplifier thereby reducing the interface circuit's RC time constant by the same amount. Because the amplifier pins the load FET's gate voltage for a given flux level, the load FET's 1/f noise is transferred to the amplifier thereby enabling single-photon readout sensitivity.

Abstract: A CMOS imaging system provides low noise read out and amplification for an array of passive pixels, each of which comprises a photodetector, an access MOSFET, and a second MOSFET that functions as a signal overflow shunt and a means for electrically injecting a test signal. The read out circuit for each column of pixels includes a high gain, wide bandwidth, CMOS differential amplifier, a reset switch and selectable feedback capacitors, selectable load capacitors, correlated double sampling and sample-and-hold circuits, an optional pipelining circuit, and an offset cancellation circuit connected to an output bus to suppress the input offset nonuniformity of the amplifier. For full process compatibility with standard silicided submicron CMOS and to maximize yield and minimize die cost, each photodiode may comprise the lightly doped source of its access MOSFET. Circuit complexity is restricted to the column buffers, which exploit signal processing capability inherent in CMOS.

Abstract: An electronically scanned buffered direct injection (ESBDI) readout circuit is provided for a long wavelength infrared focal plane array (IR FPA). The ESBDI circuit comprises a cascoded CMOS inverter amplifier that allows high detector cell density and provides high voltage amplification, low input impedance, high charge capacity, and high sensitivity in a low power staring focal plane array. The amplifier employs a cascode FET to stabilize the amplifier operating point and to provide low noise access for each unit cell. Distributed capacitance along each bus line provides large overall charge capacity in a minimum of chip real estate. When not accessed, idle IR detector cells are clamped to an externally adjustable voltage to prevent excess detector noise and crosstalk. The circuit may be fabricated on a neutron transmutation doped silicon wafer to provide threshold uniformity and low power dissipation.

Abstract: A solid state photon detector includes a semiconducting blocking layer with sufficiently low donor and acceptor concentrations that substantially no charge transport can occur by an impurity conduction mechanism. A semiconducting buffered layer is provided with a sufficiently high donor impurity concentration to create an impurity energy band and with a sufficiently high acceptor impurity concentration that an electron cannot be injected into and drift through the layer without recombining with ionized donors. A semiconducting active layer is positioned between the blocking and buffered layers with a sufficiently high donor concentration to create an impurity energy band. The acitve layer also includes a sufficiently low acceptor impurity concentration that a photogenerated electron can drift through the active layer without recombining with ionized donors.

Abstract: An electro-optic sensor for precise, direct and continuous measurement of the angular displacement between two bodies. A linear array of photodetectors is disposed on a planar surface mounted on the first body parallel to the axis about which the displacement is to be measured. The line of the array is perpendicular to this axis. A light source disposed on the planar surface near the photodetector array transmits light through optics to a reflecting reference flat mounted on the second body. The optics collimates the transmitted light and causes the reflected image of the light source to be spread into a line on and perpendicular to the photodetector array. This line image moves along the linear array as angular displacement occurs between the two bodies. No mechanical moving parts are required in the sensor.