Patents by Inventor William Koutny

William Koutny has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240066441
    Abstract: A filter system is disclosed. In an embodiment, a filter system includes a separation layer having a plurality of apertures that allow passage of a filtrate portion of a feed material from a first side of the separation layer to a second side of the separation layer, hydrophilic material integrated with the separation layer to promote the passage of the filtrate portion of the feed material through the plurality of apertures, and hydrophobic material integrated with the separation layer to inhibit blockage of the plurality of apertures by a retentate portion of the feed material.
    Type: Application
    Filed: August 24, 2023
    Publication date: February 29, 2024
    Inventors: Manu Pillai, William Koutny
  • Patent number: 10788438
    Abstract: An agricultural sensing system includes multiple sensor and/or actuator modules configured to communicate with a relay unit. The sensor and/or actuator modules are powered using solar energy and contain no batteries. The modules feature sleep modes in which some circuits are placed in a low energy mode to conserve energy and remove the need for batteries. Communications to or from the relay unit are optionally timed to avoid interference between transmissions from different sensor and/or actuator modules. The relay units are configured to relay sensor data and send commands to the sensor and/or actuator modules.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: September 29, 2020
    Assignee: WaterBit, Inc.
    Inventors: Craig Nemecek, William Koutny, Manu Pillai, Andrew Wright, Leif Chastaine
  • Publication number: 20200232939
    Abstract: An agricultural sensing system includes multiple sensor and/or actuator modules configured to communicate with a relay unit. The sensor and/or actuator modules are powered using solar energy and contain no batteries. The modules feature sleep modes in which some circuits are placed in a low energy mode to conserve energy and remove the need for batteries. Communications to or from the relay unit are optionally timed to avoid interference between transmissions from different sensor and/or actuator modules. The relay units are configured to relay sensor data and send commands to the sensor and/or actuator modules.
    Type: Application
    Filed: January 18, 2019
    Publication date: July 23, 2020
    Inventors: Craig Nemecek, William Koutny, Manu Pillai, Andrew Wright, Leif Chastaine
  • Patent number: 9018693
    Abstract: Nonvolatile charge trap memory devices with deuterium passivation of charge traps and methods of forming the same are described. In one embodiment, the device includes a channel formed from a semiconducting material overlying a surface on a substrate connecting a source and a drain of the memory device. A gate stack overlies the channel, the gate stack comprising a tunneling layer, a trapping layer, a blocking layer, a gate layer; and a deuterated gate cap layer. The gate cap layer has a higher deuterium concentration at an interface with the gate layer than at surface of the gate cap layer distal from the gate layer. In certain embodiments, the channel comprises polysilicon or recrystallized polysilicon. Other embodiments are also described.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: April 28, 2015
    Assignee: Cypress Semiconductor Corporation
    Inventors: Krishnaswamy Ramkumar, Fredrick Jenne, William Koutny
  • Publication number: 20140225116
    Abstract: Nonvolatile charge trap memory devices with deuterium passivation of charge traps and methods of forming the same are described. In one embodiment, the device includes a channel formed from a semiconducting material overlying a surface on a substrate connecting a source and a drain of the memory device. A gate stack overlies the channel, the gate stack comprising a tunneling layer, a trapping layer, a blocking layer, a gate layer; and a deuterated gate cap layer. The gate cap layer has a higher deuterium concentration at an interface with the gate layer than at surface of the gate cap layer distal from the gate layer. In certain embodiments, the channel comprises polysilicon or recrystallized polysilicon. Other embodiments are also described.
    Type: Application
    Filed: March 28, 2014
    Publication date: August 14, 2014
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Krishnaswamy Ramkumar, Fredrick Jenne, William Koutny
  • Patent number: 4764248
    Abstract: A process for minimizing bird's beak in local oxidation of silicon which is compatible with high density (VLSI) semiconductor devices is disclosed. A pad oxide is nitridized using rapid thermal nitridization, which works quickly with minimal thermal cycling of the wafer. A silicon nitride film is then deposited over the nitridized oxide. Both films are exposed to dry plasma etching which gives more consistent results than wet methods. The field oxide is then grown and finally the masking films of the nitridized oxide and silicon nitride are removed, whereby field oxides are grown with minimal bird's beak, and minimal damage to the wafer with a small number of steps. The pad oxide may be grown in the same rapid thermal annealer used for the rapid thermal nitridization. Both cycles (pad oxide growth and nitridization of the pad oxide) can be integrated to "one" cycle and performed sequentially in the same rapid thermal annealer to increase throughput and improve device quality.
    Type: Grant
    Filed: April 13, 1987
    Date of Patent: August 16, 1988
    Assignee: Cypress Semiconductor Corporation
    Inventors: Arya Bhattacherjee, William Koutny, Ritu Shrivastava, Thurman J. Rodgers