Patents by Inventor William L. Nicoll
William L. Nicoll has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10497779Abstract: A method for forming a semiconductor device comprising forming a stack of nanowires, the stack including a first nanowire having a first length, and a second nanowire having a second length, the second nanowire arranged above the first nanowire, forming a sacrificial gate stack on the stack of nanowires, growing a source/drain region on the first, second nanowires, removing the sacrificial gate stack to expose channel regions of the first and second nanowires, and forming a gate stack over the channel regions.Type: GrantFiled: July 31, 2018Date of Patent: December 3, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael A. Guillorn, William L. Nicoll, Hanfei Wang
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Patent number: 10177154Abstract: After forming a laterally contacting pair of a semiconductor fin and a conductive strap structure having a base portion vertically contacting a deep trench capacitor embedded in a substrate and a fin portion laterally contacting the semiconductor fin, conducting spikes that are formed on the sidewalls of the deep trench are removed or pushed deeper into the deep trench. Subsequently, a dielectric cap that inhibits epitaxial growth of a semiconductor material thereon is formed over at least a portion of the base portion of the conductive strap structure. The dielectric cap can be formed either over an entirety of the base portion having a stepped structure or on a distal portion of the base portion.Type: GrantFiled: August 30, 2017Date of Patent: January 8, 2019Assignee: International Business Machines CorporationInventors: Michael V. Aquilino, Veeraraghavan S. Basker, Kangguo Cheng, Gregory Costrini, Ali Khakifirooz, Byeong Y. Kim, William L. Nicoll, Ravikumar Ramachandran, Reinaldo A. Vega, Hanfei Wang, Xinhui Wang
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Patent number: 10153340Abstract: A method for forming a semiconductor device comprising forming a stack of nanowires, the stack including a first nanowire having a first length, and a second nanowire having a second length, the second nanowire arranged above the first nanowire, forming a sacrificial gate stack on the stack of nanowires, growing a source/drain region on the first, second nanowires, removing the sacrificial gate stack to expose channel regions of the first and second nanowires, and forming a gate stack over the channel regions.Type: GrantFiled: January 3, 2017Date of Patent: December 11, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael A. Guillorn, William L. Nicoll, Hanfei Wang
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Publication number: 20180337232Abstract: A method for forming a semiconductor device comprising forming a stack of nanowires, the stack including a first nanowire having a first length, and a second nanowire having a second length, the second nanowire arranged above the first nanowire, forming a sacrificial gate stack on the stack of nanowires, growing a source/drain region on the first, second nanowires, removing the sacrificial gate stack to expose channel regions of the first and second nanowires, and forming a gate stack over the channel regions.Type: ApplicationFiled: July 31, 2018Publication date: November 22, 2018Inventors: Michael A. GUILLORN, William L. NICOLL, Hanfei WANG
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Patent number: 10121855Abstract: A method for forming a semiconductor device comprising forming a stack of nanowires, the stack including a first nanowire having a first length, and a second nanowire having a second length, the second nanowire arranged above the first nanowire, forming a sacrificial gate stack on the stack of nanowires, growing a source/drain region on the first, second nanowires, removing the sacrificial gate stack to expose channel regions of the first and second nanowires, and forming a gate stack over the channel regions.Type: GrantFiled: June 9, 2016Date of Patent: November 6, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael A. Guillorn, William L. Nicoll, Hanfei Wang
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Publication number: 20170365606Abstract: After forming a laterally contacting pair of a semiconductor fin and a conductive strap structure having a base portion vertically contacting a deep trench capacitor embedded in a substrate and a fin portion laterally contacting the semiconductor fin, conducting spikes that are formed on the sidewalls of the deep trench are removed or pushed deeper into the deep trench. Subsequently, a dielectric cap that inhibits epitaxial growth of a semiconductor material thereon is formed over at least a portion of the base portion of the conductive strap structure. The dielectric cap can be formed either over an entirety of the base portion having a stepped structure or on a distal portion of the base portion.Type: ApplicationFiled: August 30, 2017Publication date: December 21, 2017Inventors: Michael V. Aquilino, Veeraraghavan S. Basker, Kangguo Cheng, Gregory Costrini, Ali Khakifirooz, Byeong Y. Kim, William L. Nicoll, Ravikumar Ramachandran, Reinaldo A. Vega, Hanfei Wang, Xinhui Wang
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Patent number: 9825041Abstract: Various embodiments include methods and integrated circuit (IC) structures. In some cases, an IC can include: a substrate; a deep trench within the substrate; a buried oxide (BOX) layer adjacent the deep trench; a first fin structure over the deep trench; a second fin structure over the BOX layer; an ONO layer over the first fin structure; and a gate electrode contacting the ONO layer.Type: GrantFiled: August 15, 2016Date of Patent: November 21, 2017Assignee: GLOBALFOUNDRIES INC.Inventors: William L. Nicoll, Byeong Y. Kim
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Patent number: 9818741Abstract: After forming a laterally contacting pair of a semiconductor fin and a conductive strap structure having a base portion vertically contacting a deep trench capacitor embedded in a substrate and a fin portion laterally contacting the semiconductor fin, conducting spikes that are formed on the sidewalls of the deep trench are removed or pushed deeper into the deep trench. Subsequently, a dielectric cap that inhibits epitaxial growth of a semiconductor material thereon is formed over at least a portion of the base portion of the conductive strap structure. The dielectric cap can be formed either over an entirety of the base portion having a stepped structure or on a distal portion of the base portion.Type: GrantFiled: June 30, 2015Date of Patent: November 14, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael V. Aquilino, Veeraraghavan S. Basker, Kangguo Cheng, Gregory Costrini, Ali Khakifirooz, Byeong Y. Kim, William L. Nicoll, Ravikumar Ramachandran, Reinaldo A. Vega, Hanfei Wang, Xinhui Wang
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Publication number: 20170194429Abstract: A method for forming a semiconductor device comprising forming a stack of nanowires, the stack including a first nanowire having a first length, and a second nanowire having a second length, the second nanowire arranged above the first nanowire, forming a sacrificial gate stack on the stack of nanowires, growing a source/drain region on the first, second nanowires, removing the sacrificial gate stack to expose channel regions of the first and second nanowires, and forming a gate stack over the channel regions.Type: ApplicationFiled: June 9, 2016Publication date: July 6, 2017Inventors: Michael A. Guillorn, William L. Nicoll, Hanfei Wang
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Publication number: 20170194431Abstract: A method for forming a semiconductor device comprising forming a stack of nanowires, the stack including a first nanowire having a first length, and a second nanowire having a second length, the second nanowire arranged above the first nanowire, forming a sacrificial gate stack on the stack of nanowires, growing a source/drain region on the first, second nanowires, removing the sacrificial gate stack to expose channel regions of the first and second nanowires, and forming a gate stack over the channel regions.Type: ApplicationFiled: January 3, 2017Publication date: July 6, 2017Inventors: MICHAEL A. GUILLORN, WILLIAM L. NICOLL, HANFEI WANG
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Patent number: 9607993Abstract: Capacitor strap connections for a memory cell and device structures for making such capacitor strap connections. A deep trench capacitor is formed in a substrate. A collar comprised of an electrical insulator is formed at least partially inside an upper section of a deep trench in which the deep trench capacitor is formed. A portion of the collar is removed to define a notch extending through the collar, and a connection strap is formed in the notch. A fin is formed from a portion of the substrate, and is coupled by the connection strap with an electrode of the deep trench capacitor that is located inside the deep trench.Type: GrantFiled: January 27, 2016Date of Patent: March 28, 2017Assignee: GLOBALFOUNDRIES Inc.Inventors: Byeong Y. Kim, William L. Nicoll
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Patent number: 9570550Abstract: A method for forming a semiconductor device comprising forming a stack of nanowires, the stack including a first nanowire having a first length, and a second nanowire having a second length, the second nanowire arranged above the first nanowire, forming a sacrificial gate stack on the stack of nanowires, growing a source/drain region on the first, second nanowires, removing the sacrificial gate stack to expose channel regions of the first and second nanowires, and forming a gate stack over the channel regions.Type: GrantFiled: January 5, 2016Date of Patent: February 14, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael A. Guillorn, William L. Nicoll, Hanfei Wang
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Publication number: 20170005098Abstract: After forming a laterally contacting pair of a semiconductor fin and a conductive strap structure having a base portion vertically contacting a deep trench capacitor embedded in a substrate and a fin portion laterally contacting the semiconductor fin, conducting spikes that are formed on the sidewalls of the deep trench are removed or pushed deeper into the deep trench. Subsequently, a dielectric cap that inhibits epitaxial growth of a semiconductor material thereon is formed over at least a portion of the base portion of the conductive strap structure. The dielectric cap can be formed either over an entirety of the base portion having a stepped structure or on a distal portion of the base portion.Type: ApplicationFiled: June 30, 2015Publication date: January 5, 2017Inventors: Michael V. Aquilino, Veeraraghavan S. Basker, Kangguo Cheng, Gregory Costrini, Ali Khakifirooz, Byeong Y. Kim, William L. Nicoll, Ravikumar Ramachandran, Reinaldo A. Vega, Hanfei Wang, Xinhui Wang