Patents by Inventor William L. Wilkinson

William L. Wilkinson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11977817
    Abstract: A system and method for pre-operatively optimizing a fit of an orthopaedic implant relative to a particular individuals anatomy is provided.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: May 7, 2024
    Assignee: SMITH & NEPHEW, INC.
    Inventors: Brian W. McKinnon, Ruxandra C. Marinescu Tanasoca, Randy C. Winebarger, William L. Bowers, Jr., James B. Wiebe, III, Nathaniel M. Lenz, Zachary C. Wilkinson, Sean M. Haddock, Ryan L Landon
  • Patent number: 6989229
    Abstract: Photoresist on a wafer is exposed using tiles on a mask that improve flare performance. Features that are not to be exposed on the photoresist correspond to features on the mask. The various features are surrounded by other features that vary and thus affect flare differently. Selected features have tiles added nearby but also far enough away to improve uniformity in the effects of flare on the various features that are intended to be present in the photoresist. The tiles are made either very small in width or partially absorbing so that the tiles are not resolved in the photoresist. Thus the tiles reduce flare but do not alter the desired pattern in the photoresist.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: January 24, 2006
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kevin D. Lucas, Jonathan L. Cobb, William L. Wilkinson
  • Publication number: 20040188383
    Abstract: Photoresist on a wafer is exposed using tiles on a mask that improve flare performance. Features that are not to be exposed on the photoresist correspond to features on the mask. The various features are surrounded by other features that vary and thus affect flare differently. Selected features have tiles added nearby but also far enough away to improve uniformity in the effects of flare on the various features that are intended to be present in the photoresist. The tiles are made either very small in width or partially absorbing so that the tiles are not resolved in the photoresist. Thus the tiles reduce flare but do not alter the desired pattern in the photoresist.
    Type: Application
    Filed: March 27, 2003
    Publication date: September 30, 2004
    Inventors: Kevin D. Lucas, Jonathan L. Cobb, William L. Wilkinson
  • Patent number: 6649452
    Abstract: A lithographic reticle with subresolution features in the design-pattern is used to control critical dimensions in a semiconductor manufacturing process. After the location of design and processing features is determined, subresolution features are formed in areas devoid of design and processing features. The subresolution features can substantially fill all of the area devoid of design processing features or, instead, selectively fill portions of the area. In one embodiment, the width of the area devoid of design and processing features is less than two times the width of a feature. The presence of the subresolution features results in improved control of small dimensions of features in semiconductor processing, thereby increasing yield and device performance.
    Type: Grant
    Filed: February 28, 2002
    Date of Patent: November 18, 2003
    Assignee: Motorola, Inc.
    Inventors: Kevin D. Lucas, William L. Wilkinson, Cesar Garza
  • Publication number: 20030162329
    Abstract: A lithographic reticle with subresolution features in the design-pattern is used to control critical dimensions in a semiconductor manufacturing process. To determine the location of subresolution features the location of design and processing features is determined and the subresolution features are formed in areas devoid of design and processing features. The subresolution features can substantially fill all of the area devoid of design and processing features or, instead, selectively fill portions of the area. In one embodiment, the width of the area devoid of design and processing features is less than two times the width of a feature. The presence of the subresolution features results in improved control of small dimensions of features in semiconductor processing, thereby increasing yield and device performance.
    Type: Application
    Filed: February 28, 2002
    Publication date: August 28, 2003
    Inventors: Kevin D. Lucas, William L. Wilkinson, Cesar Garza
  • Patent number: 4267401
    Abstract: A seal plug for conduits is disclosed having a plug core including at least one radially-expansible seal member for sealing the conduit in which it is disposed, while permitting passage of cables or the like therethrough. Until required for the cable or cables, the passages in the seal plug are closed by removable pin inserts, retainer means being provided to hold the inserts in place. The plug includes longitudinal compression means to bring the seal member into sealing contact with the conduit wall. Each passage may open to the circumference of the respective seal member via slits to permit sideways insertion of the cable therein.
    Type: Grant
    Filed: July 3, 1978
    Date of Patent: May 12, 1981
    Inventor: William L. Wilkinson