Patents by Inventor William Lacy
William Lacy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230297372Abstract: A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.Type: ApplicationFiled: December 5, 2022Publication date: September 21, 2023Inventors: William Lacy, Gregory Michael Thorson, Christopher Aaron Clark, Norman Paul Jouppi, Thomas Norrie, Andrew Everett Phelps
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Patent number: 11520581Abstract: A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.Type: GrantFiled: May 24, 2021Date of Patent: December 6, 2022Assignee: Google LLCInventors: William Lacy, Gregory Michael Thorson, Christopher Aaron Clark, Norman Paul Jouppi, Thomas Norrie, Andrew Everett Phelps
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Patent number: 11195610Abstract: A method and apparatus are disclosed herein for generating and sending priority alert notifications based on medical information, such as, for example, medical information obtained from analyzing medical images. In one embodiment, the method comprises: determining, using an image analysis engine, whether one or more features in a medical image of a patient meet predefined criteria, the predefined criteria being indicative of a medical condition; determining, using the image analysis engine, whether an alert notification is to be sent regarding results of determining whether the one or more features in the medical image meet the predefined criteria; and sending the alert notification with indicia indicative of a priority level if the one or more features in the medical image meet the predefined criteria, including sending medical information that prompted the image analysis engine to send the notification at the priority level.Type: GrantFiled: November 22, 2017Date of Patent: December 7, 2021Inventors: Takuya Shimomura, William Lacy
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Publication number: 20210357212Abstract: A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.Type: ApplicationFiled: May 24, 2021Publication date: November 18, 2021Inventors: William Lacy, Gregory Michael Thorson, Christopher Aaron Clark, Norman Paul Jouppi, Thomas Norrie, Andrew Everett Phelps
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Patent number: 11016764Abstract: A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.Type: GrantFiled: April 8, 2020Date of Patent: May 25, 2021Assignee: Google LLCInventors: William Lacy, Gregory Michael Thorson, Christopher Aaron Clark, Norman Paul Jouppi, Thomas Norrie, Andrew Everett Phelps
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Patent number: 10915318Abstract: A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.Type: GrantFiled: March 4, 2019Date of Patent: February 9, 2021Assignee: Google LLCInventors: William Lacy, Gregory Michael Thorson, Christopher Aaron Clark, Norman Paul Jouppi, Thomas Norrie, Andrew Everett Phelps
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Publication number: 20200233663Abstract: A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.Type: ApplicationFiled: April 8, 2020Publication date: July 23, 2020Inventors: William Lacy, Gregory Michael Thorson, Christopher Aaron Clark, Norman Paul Jouppi, Thomas Norrie, Andrew Everett Phelps
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Publication number: 20190243645Abstract: A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.Type: ApplicationFiled: March 4, 2019Publication date: August 8, 2019Inventors: William Lacy, Gregory Michael Thorson, Christopher Aaron Clark, Norman Paul Jouppi, Thomas Norrie, Andrew Everett Phelps
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Publication number: 20190156937Abstract: A method and apparatus are disclosed herein for generating and sending priority alert notifications based on medical information, such as, for example, medical information obtained from analyzing medical images. In one embodiment, the method comprises: determining, using an image analysis engine, whether one or more features in a medical image of a patient meet predefined criteria, the predefined criteria being indicative of a medical condition; determining, using the image analysis engine, whether an alert notification is to be sent regarding results of determining whether the one or more features in the medical image meet the predefined criteria; and sending the alert notification with indicia indicative of a priority level if the one or more features in the medical image meet the predefined criteria, including sending medical information that prompted the image analysis engine to send the notification at the priority level.Type: ApplicationFiled: November 22, 2017Publication date: May 23, 2019Inventors: Takyuka Shimomura, William Lacy
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Patent number: 10261786Abstract: A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.Type: GrantFiled: March 9, 2017Date of Patent: April 16, 2019Assignee: Google LLCInventors: William Lacy, Gregory Michael Thorson, Christopher Aaron Clark, Norman Paul Jouppi, Thomas Norrie, Andrew Everett Phelps
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Publication number: 20180260220Abstract: A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.Type: ApplicationFiled: March 9, 2017Publication date: September 13, 2018Inventors: William Lacy, Gregory Michael Thorson, Christopher Aaron Clark, Norman Paul Jouppi, Thomas Norrie, Andrew Everett Phelps
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Publication number: 20120261456Abstract: The present invention provides a hand-held device for the insertion of fasteners into the ground for the purpose of anchoring sheet-like materials such as geotechnical mats for soil stabilization, and also for securing netting to prevent crop wastage. The device includes an anti-jamming mechanism that lessens the frequency of fastener jamming thereby increasing the work efficiency of an operator and saving wastage of fasteners.Type: ApplicationFiled: October 5, 2010Publication date: October 18, 2012Inventors: Christopher John Lacy, Darren William Lacy
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Publication number: 20110225800Abstract: The present invention provides a device for the insertion of fasteners into the ground for the purpose of anchoring sheet-like materials such as geotechnical mats in soil stabilization or for securing forms of netting to prevent crop wastage. A further aspect of this invention provides a form of securing fasteners by a method that reduces damage or impediment in the operation of the fastener insertion device.Type: ApplicationFiled: November 17, 2009Publication date: September 22, 2011Inventors: Darren William Lacy, Christopher John Lacy
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Publication number: 20070287558Abstract: A golf ball comprising a pre-formed non-spherical inner core insert; an outer core molded about the insert to form a sphere having an outer surface; and a cover disposed about the outer core, the cover having an outer dimpled surface; wherein the outer core and cover are optically transparent or translucent.Type: ApplicationFiled: March 26, 2007Publication date: December 13, 2007Inventors: Michael Sullivan, William Lacy, Herbert Boehm
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Publication number: 20060189412Abstract: A golf ball including a core; a cover having a first water vapor transmission rate; and a vapor barrier layer disposed between the core and the cover, the barrier layer being formed from a polymer including a nano-material having an average particle size of 100 nm or less; wherein the nano-material creates a tortuous path across the barrier layer such that the barrier layer has a second water vapor transmission rate less than the first.Type: ApplicationFiled: February 18, 2005Publication date: August 24, 2006Inventors: Michael Sullivan, Derek Ladd, William Lacy
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Publication number: 20050197211Abstract: A golf ball comprising a pre-formed selectively-weighted inner core insert including a hub having a specific gravity of greater than 1.2 and a plurality of outer elements connected to the hub and having a specific gravity of less than 0.9; an outer core molded about the insert to form a sphere having an outer surface; and a cover disposed around the outer core, the cover having an outer dimpled surface; wherein the outer core and cover are optically transparent or translucent.Type: ApplicationFiled: April 7, 2005Publication date: September 8, 2005Inventors: Michael Sullivan, William Lacy, Herbert Boehm
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Publication number: 20050072718Abstract: The system and device of the present invention is a technology designed to meet the biological nutrient removal requirements for the treatment of sanitary and municipal wastewater, storm water run-offs and other biologically contaminated water. This technology dies not require the addition of water treatment chemicals. The treatment process of the present invention removes BOD loading, converts nitrogenous loading to nitrates, removes the nitrates, phosphorus and kills coliform and other bacteria, as well as parasites and fungi.Type: ApplicationFiled: January 12, 2004Publication date: April 7, 2005Inventors: William Lacy, Alexander Blake
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Publication number: 20050038173Abstract: A golf ball including a core and a layer disposed concentrically about the core; wherein at least one of the core or the layer is formed of a polymer composition including a lipid-based nanotubule-encapsulated healing agent; the healing agent being present in an amount between about 0.1% and about 20.0% of the composition by weight.Type: ApplicationFiled: September 3, 2004Publication date: February 17, 2005Inventors: Kevin Harris, William Lacy
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Patent number: 5355870Abstract: This laryngoscope has a cylindrical metal casing serving as a handle. An insulated, plastic blade is rotatably mounted near one end thereof on the casing between angularly spaced operating and nonoperating positions. A blade projects from the blade assembly to depress a patient's tongue. Batteries in the casing apply positive electric polarity to an electrode on the casing and negative electric polarity to the casing. A lensed end lamp having a bulb, base and end terminal is mounted on the blade assembly with the terminal in contact with a leaf spring which in turn contacts the electrode when the assembly is rotated to an operating position. A flange on the casing contacts the lamp base to complete a power supply circuit when the blade assembly is rotated to the operating position for lighting the lamp bulb. A light conductive rod extends from the lamp bulb to project light into the patient's larynix while the blade depresses the patient's tongue.Type: GrantFiled: July 28, 1992Date of Patent: October 18, 1994Inventor: William Lacy