Patents by Inventor William Landucci

William Landucci has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Substrate pads with reduced impedance mismatch and methods to fabricate substrate pads
    Patent number: 6765298
    Abstract: To significantly reduce parasitic capacitance of component's landing pad, the present invention forms patterned holes in reference potential layers below the pad, thus effectively increasing the dielectric distance between the pad and the reference potential planes below the pad, raising the characteristic impedance of the pad above that of the trace connected to the pad. A controlled amount of parasitic capacitance is re-introduced to the pad by forming at least one grounded metal plate adjacent to the pad, bringing the characteristic impedance of the pad to substantially match that of the trace. The distance of the metal plates from the pad, and the configuration of the patterned holes are predetermined to substantially match the pad's impedance with that of the trace.
    Type: Grant
    Filed: December 8, 2001
    Date of Patent: July 20, 2004
    Assignee: National Semiconductor Corporation
    Inventors: Tsun-kit Chin, William Landucci
  • Substrate pads with reduced impedance mismatch and methods to fabricate substrate pads
    Publication number: 20030107056
    Abstract: To significantly reduce parasitic capacitance of component's landing pad, the present invention forms patterned holes in reference potential layers below the pad, thus effectively increasing the dielectric distance between the pad and the reference potential planes below the pad, raising the characteristic impedance of the pad above that of the trace connected to the pad. A controlled amount of parasitic capacitance is re-introduced to the pad by forming at least one grounded metal plate adjacent to the pad, bringing the characteristic impedance of the pad to substantially match that of the trace. The distance of the metal plates from the pad, and the configuration of the patterned holes are predetermined to substantially match the pad's impedance with that of the trace.
    Type: Application
    Filed: December 8, 2001
    Publication date: June 12, 2003
    Applicant: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Tsun-Kit Chin, William Landucci