Patents by Inventor William Larson

William Larson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250375158
    Abstract: A garment can include a pocket to hold a removable electronic device. The electronic device can sense body core temperature, heart rate, skin conductivity, blood oxygen level, and geo-spatial location of the wearer, and transmit this data wirelessly to a mapping application. A viewer of the application can track the location and the health status of the wearer. A leader at a search and rescue command post can easily monitor both the location and well-being of personnel through the mapping application while they are on a mission. An algorithm on the backend can determine a health status color based on the sensor data. The pocket design facilitates insertion and removal of the electronics, and ensures that sensors are positioned at optimal locations on the body.
    Type: Application
    Filed: June 10, 2025
    Publication date: December 11, 2025
    Inventors: Kouta Ueki, Aubin Kevrekidis, William Larson, James Hall, Elizabeth Guider Smith, Mihir Shenoy, Yatharth Rajakumar, Cameron Baird, Parmida Arghavani, Rymas Aladmawy, Max Costa, Yoh Morita, Cynthia Tian, John A. Fabel, Sam Woodruff, Rowan G. Reichard, Alex Lagrant, Olivia Hansen Fisher, Kieran Palmer, Evelyn Ross
  • Publication number: 20250263604
    Abstract: A cracking furnace for cracking a hydrocarbon feed, the furnace including a firebox having a single radiant zone including, a first plurality of cracking coils each having a first shape arranged within the firebox. The radiant zone includes a second plurality of cracking coils each having a second shape arranged within the radiant zone. A burner section positioned below the first plurality cracking coils and below the second plurality of cracking coils. A convection section is positioned on top of the firebox configured to recover residual heat from the firebox.
    Type: Application
    Filed: April 21, 2025
    Publication date: August 21, 2025
    Applicant: T.EN Process Technology, Inc.
    Inventors: Astrid Han, Huynh Pham, George Dabney, JR., John Murphey, III, William Larson, Chinh Dang, Thomas M. Pickett, Yong Wang
  • Patent number: 12281269
    Abstract: A cracking furnace for cracking a hydrocarbon feed, the furnace including a firebox having a single radiant zone including, a first plurality of cracking coils each having a first shape arranged within the firebox. The radiant zone includes a second plurality of cracking coils each having a second shape arranged within the radiant zone. A burner section positioned below the first plurality cracking coils and below the second plurality of cracking coils. A convection section is positioned on top of the firebox configured to recover residual heat from the firebox.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: April 22, 2025
    Assignee: T.EN PROCESS TECHNOLOGY, INC.
    Inventors: Thomas M. Pickett, Yong Wang, Chinh Dang, William Larson, John Murphey, III, George Dabney, Jr., Huynh Pham, Astrid Han
  • Publication number: 20220119716
    Abstract: A cracking furnace for cracking a hydrocarbon feed, the furnace including a firebox having a single radiant zone including, a first plurality of cracking coils each having a first shape arranged within the firebox. The radiant zone includes a second plurality of cracking coils each having a second shape arranged within the radiant zone. A burner section positioned below the first plurality cracking coils and below the second plurality of cracking coils. A convection section is positioned on top of the firebox configured to recover residual heat from the firebox.
    Type: Application
    Filed: October 15, 2020
    Publication date: April 21, 2022
    Applicant: Technip Process Technology, Inc.
    Inventors: Thomas M. Pickett, Yong Wang, Chinh Dang, William Larson, John Murphey, III, George Dabney, JR., Huynh Pham, Astrid Han
  • Patent number: 9818742
    Abstract: An isolation structure prevents inter-device and intra-device leakage in first and second adjacent semiconductor devices in a substrate. The first and second semiconductor devices each include a gate region and at least one active region. A first channel stop region is configured to surround the first semiconductor device. A second channel stop region is configured to surround the second semiconductor device. A first field plate is located above at least part of the first channel stop region, and overlaps the gate region of the first semiconductor device in a first overlap region. A second field plate is located above at least part of the second channel stop region, and overlaps the gate region of the second semiconductor device in a second overlap region.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: November 14, 2017
    Assignee: POLAR SEMICONDUCTOR, LLC
    Inventor: William Larson
  • Publication number: 20160037586
    Abstract: An induction heating apparatus includes a susceptor defining a reaction chamber. A housing is spaced from the susceptor opposite the reaction chamber and defines a port. A void space is defined between the housing and the susceptor. An induction coil extends through the port and is disposed within the void space for conducting an electric current to heat the susceptor to heat the reaction chamber. A flange comprises a metal material and is coupled to the housing at the port for sealing the port with the induction coil extending through the flange. An isolator is disposed between the flange and the housing to prevent the electric current from passing into the housing.
    Type: Application
    Filed: March 10, 2014
    Publication date: February 4, 2016
    Inventors: Timothy Armstrong, Matthew Deeg, Jennifer Larimer, William Larson, Keith McCoy, Michael John Molnar, James A. Schultz
  • Publication number: 20150232987
    Abstract: A manufacturing apparatus deposits material on a carrier body. The manufacturing apparatus includes a housing defining a chamber. The housing defines an inlet for introducing a deposition composition, which comprises the material or a precursor thereof, into the chamber. The housing also defines an outlet through the housing for exhausting the deposition composition from the chamber. An electrode is disposed through the housing with the electrode at least partially disposed within the chamber. A socket has an exterior surface and is connected to the electrode within the chamber for receiving the carrier body. A release coating is disposed on the exterior surface of the socket for promoting separation of the socket from the carrier body, and the material deposited thereon, to harvest the carrier body.
    Type: Application
    Filed: July 9, 2013
    Publication date: August 20, 2015
    Inventors: Matthew Deeg, David Hillabrand, William Larson
  • Publication number: 20130299911
    Abstract: An isolation structure prevents inter-device and intra-device leakage in first and second adjacent semiconductor devices in a substrate. The first and second semiconductor devices each include a gate region and at least one active region. A first channel stop region is configured to surround the first semiconductor device. A second channel stop region is configured to surround the second semiconductor device. A first field plate is located above at least part of the first channel stop region, and overlaps the gate region of the first semiconductor device in a first overlap region. A second field plate is located above at least part of the second channel stop region, and overlaps the gate region of the second semiconductor device in a second overlap region.
    Type: Application
    Filed: May 11, 2012
    Publication date: November 14, 2013
    Applicant: POLAR SEMICONDUCTOR, INC.
    Inventor: William Larson
  • Patent number: 8536659
    Abstract: A channel stop is provided for a semiconductor device that includes at least one active region. The channel stop is configured to surround the semiconductor device, to abut the at least one active region at a periphery of the semiconductor device, and to share an electrical connection with the at least one active region.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: September 17, 2013
    Assignee: Polar Seminconductor, Inc.
    Inventors: William Larson, Gregory Michaelson
  • Publication number: 20120053383
    Abstract: The present invention is directed to a method for producing, inter alia, olefins from refinery saturated and unsaturated off-gas. Furthermore, said refinery streams are not required to undergo deoxygenation reaction in a separate reactor system provided they are fed to the pyrolysis furnace. The refinery off-gases are treated to produce olefins such as ethylene and propylene. Gases from petrochemical facilities, gas separation plants and similar facilities that produce light gases containing ethane and propane are useful in the present method.
    Type: Application
    Filed: August 25, 2011
    Publication date: March 1, 2012
    Applicant: Stone & Webster Process Technology, Inc.
    Inventors: Wadie MALATY, Richard H. McCue, David J. Brown, William Larson
  • Publication number: 20110024803
    Abstract: A channel stop is provided for a semiconductor device that includes at least one active region. The channel stop is configured to surround the semiconductor device, to abut the at least one active region at a periphery of the semiconductor device, and to share an electrical connection with the at least one active region.
    Type: Application
    Filed: July 30, 2009
    Publication date: February 3, 2011
    Applicant: POLAR SEMICONDUCTOR, INC.
    Inventors: William Larson, Gregory Michaelson
  • Publication number: 20070279971
    Abstract: A pseudo-spin valve for memory applications, such as magnetoresistive random access memory (MRAM), and methods for fabricating the same, are disclosed. Advantageously, memory devices with the advantageous pseudo-spin valve configuration can be fabricated without cobalt-iron and without anti-ferromagnetic layers, thereby promoting switching repeatability.
    Type: Application
    Filed: September 27, 2006
    Publication date: December 6, 2007
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Timothy Vogt, Romney Katti, Dan Schipper, Theodore Zhu, Anthony Arrott, Joel Drewes, Harry Liu, William Larson
  • Patent number: 7029923
    Abstract: A magnetic bit structure for a magneto-resistive memory is disclosed that has bit ends that are sufficiently large to accommodate a minimum size contact or via hole. By providing such an arrangement, the magnetic bit structure may be fabricated using conventional contact and/or via processing steps. As such, the cost of manufacturing the device may be reduced, and the overall achievable yield may be increased.
    Type: Grant
    Filed: December 11, 2003
    Date of Patent: April 18, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Harry Liu, William Larson, Lonny Berg, Theodore Zhu, Shaoping Li, Romney R. Katti, Yong Lu, Anthony Arrott
  • Patent number: 6872997
    Abstract: A magnetic bit structure for a magneto-resistive memory is disclosed that has bit ends that are sufficiently large to accommodate a minimum size contact or via hole. By providing such an arrangement, the magnetic bit structure may be fabricated using conventional contact and/or via processing steps. As such, the cost of manufacturing the device may be reduced, and the overall achievable yield may be increased.
    Type: Grant
    Filed: January 26, 2004
    Date of Patent: March 29, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Harry Liu, William Larson, Lonny Berg, Theodore Zhu, Shaoping Li, Romney R. Katti, Yong Lu, Anthony Arrott
  • Publication number: 20050016046
    Abstract: The present invention provides frame assembly devices for attachment to a commercially available picture frame that allows for the quick and easy insertion or removal of an item of display in the picture frame. The present invention also provides a method for adapting an assembled commercially available picture frame to allow display materials to be quickly and easily inserted and removed from the picture frame.
    Type: Application
    Filed: July 23, 2003
    Publication date: January 27, 2005
    Inventor: William Larson
  • Patent number: 6822295
    Abstract: A device and method of manufacture for a low capacitance overvoltage protection device. This is accomplished through the use of PiN diodes to shunt overvoltage away from internal circuit elements. PiN diodes are useful because they exhibit a low capacitance in reverse bias mode. Radio frequency integrated circuits and other integrated circuits operated at high frequency are sensitive to capacitance. This invention protects against circuit damage due to overvoltage events while keeping capacitance low through the use of PiN diodes.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: November 23, 2004
    Assignee: Honeywell International Inc.
    Inventor: William Larson
  • Publication number: 20040155307
    Abstract: A magnetic bit structure for a magneto-resistive memory is disclosed that has bit ends that are sufficiently large to accommodate a minimum size contact or via hole. By providing such an arrangement, the magnetic bit structure may be fabricated using conventional contact and/or via processing steps. As such, the cost of manufacturing the device may be reduced, and the overall achievable yield may be increased.
    Type: Application
    Filed: January 26, 2004
    Publication date: August 12, 2004
    Inventors: Harry Liu, William Larson, Lonny Berg, Theodore Zhu, Shaoping Li, Romney R. Katti, Yong Lu, Anthony Arrott
  • Publication number: 20040126709
    Abstract: A magnetic bit structure for a magneto-resistive memory is disclosed that has bit ends that are sufficiently large to accommodate a minimum size contact or via hole. By providing such an arrangement, the magnetic bit structure may be fabricated using conventional contact and/or via processing steps. As such, the cost of manufacturing the device may be reduced, and the overall achievable yield may be increased.
    Type: Application
    Filed: December 11, 2003
    Publication date: July 1, 2004
    Inventors: Harry Liu, William Larson, Lonny Berg, Theodore Zhu, Shaoping Li, Romney R. Katti, Yong Lu, Anthony Arrott
  • Patent number: 6717194
    Abstract: A magnetic bit structure for a magneto-resistive memory is disclosed that has bit ends that are sufficiently large to accommodate a minimum size contact or via hole. By providing such an arrangement, the magnetic bit structure may be fabricated using conventional contact and/or via processing steps. As such, the cost of manufacturing the device may be reduced, and the overall achievable yield may be increased.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: April 6, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Harry Liu, William Larson, Lonny Berg, Theodore Zhu, Shaoping Li, Romney R. Katti, Yong Lu, Anthony Arrott
  • Publication number: 20040021178
    Abstract: A device and method of manufacture for a low capacitance overvoltage protection device. This is accomplished through the use of PiN diodes to shunt overvoltage away from internal circuit elements. PiN diodes are useful because they exhibit a low capacitance in reverse bias mode. Radio frequency integrated circuits and other integrated circuits operated at high frequency are sensitive to capacitance. This invention protects against circuit damage due to overvoltage events while keeping capacitance low through the use of PiN diodes.
    Type: Application
    Filed: July 30, 2002
    Publication date: February 5, 2004
    Inventor: William Larson