Abstract: A video compression system compresses video frames comprising pixels defined by n-bit color values. Encoder of video compression system determines the difference between a current pixel value and a plurality reference pixel values. Encoder sends difference value to decoder. Decoder determines current pixel value by adjusting a reference pixel color value by delta value.

Abstract: A video compression system compresses video frames comprising pixels defined by n-bit color values. Encoder of video compression system determines the difference between a current pixel value and a plurality reference pixel values. Encoder sends difference value to decoder. Decoder determines current pixel value by adjusting a reference pixel color value by delta value.

Abstract: A video compression system compresses video frames comprising pixels defined by n-bit color values. Encoder of video compression system determines the difference between a current pixel value and a plurality reference pixel values. Encoder sends difference value to decoder. Decoder determines current pixel value by adjusting a reference pixel color value by delta value.

Abstract: A video compression system compresses video frames comprising pixels defined by n-bit color values. Encoder of video compression system determines the difference between a current pixel value and a plurality reference pixel values. Encoder sends difference value to decoder. Decoder determines current pixel value by adjusting a reference pixel color value by delta value.

Abstract: A graphics accelerator includes a vertex input for receiving vertex data, an output for forwarding processed data, and a processor coupled with the vertex input and output. The graphics accelerator also includes an instruction input that receives instructions for processing the vertex data received from the vertex input. The processor is responsive to wide word instructions.

Abstract: A graphics accelerator includes a vertex input for receiving vertex data, an output for forwarding processed data, and a processor coupled with the vertex input and output. The graphics accelerator also includes an instruction input that receives instructions for processing the vertex data received from the vertex input. The processor is responsive to wide word instructions.

Abstract: A graphics accelerator includes a vertex input for receiving vertex data, an output for forwarding processed data, and a processor coupled with the vertex input and output. The graphics accelerator also includes an instruction input that receives instructions for processing the vertex data received from the vertex input. The processor is responsive to wide word instructions.

Abstract: A graphics accelerator includes a vertex input for receiving vertex data, an output for forwarding processed data, and a processor coupled with the vertex input and output. The graphics accelerator also includes an instruction input that receives instructions for processing the vertex data received from the vertex input. The processor is responsive to wide word instructions.

Abstract: An apparatus for processing a graphics request stream begins processing subsequent vertex data while processing previous vertex data. To that end, the apparatus has a vertex assembler having an input for receiving graphics requests, and a processor (coupled to the vertex assembler) for processing received graphics requests. The processor provides a headstart signal to the vertex assembler to indicate that the processor is processing a new graphics request. Upon receipt of the headstart signal, the vertex assembler causes the processor to restart processing of the new graphics request if the new request is determined to have not been properly assembled.