Abstract: A process for fabricating semiconductor devices including a field effect transistor has been described incorporating a substrate, a layer of thermal oxide having windows, a layer of polycrystalline silicon to form the gate electrode of field effect transistors and a first interconnection layer, a layer of silicon nitride, a layer of phosphorous doped silicon dioxide which have windows larger than the device windows and which is reflowed to smooth its upper surface over the polysilicon interconnections and to provide round edges, impurity regions formed on either side of the silicon gate electrode and bounded by the thermal oxide, forming openings to the drain and source regions, depositing a layer of metal over the substrate and defining the layer of metal to form a second layer of interconnections and also to provide ohmic contact to the source and drain regions.