Abstract: A zero turning radius mower park brake system includes a park brake pawl on a transmission which engages a park brake to a pair of independently driven traction wheels. A park brake link may be pivotably mounted to the park brake pawl and connected to a left steering lever and a right steering lever. The park brake link may pivot while moving the park brake pawl forward to a park brake engaged position if only one of the steering levers is moved outward from a neutral traction drive position.

Abstract: The instant disclosure is generally directed to low viscosity, low volatility lubricating compositions. The lubricating composition of the instant disclosure includes an oil of lubricating viscosity that contains a lubricating base oil and a hydrocarbon oil. The hydrocarbon oil makes up least 20 wt % of the oil of lubricating viscosity and has a kinematic viscosity of less than 3.7 c St at 100° C. and a NOACK volatility (measured by ASTM D5800) of less than 25 wt %. The lubricant composition further includes a polyalkenyl succinimide dispersant, and, optionally, other formulation additives. The lubricating compositions have been shown to increase fuel economy in internal combustion engines.

Abstract: A head-mounted display may include a display system and an optical system in a housing. The display system may have displays that produce images. Positioners may be used to move the displays relative to the eye positions of a user's eyes. An adjustable optical system may include tunable lenses such as tunable cylindrical liquid crystal lenses. The displays may be viewed through the lenses when the user's eyes are at the eye positions. A sensor may be incorporated into the head-mounted display to measure refractive errors in the user's eyes. The sensor may include waveguides and volume holograms, and a camera for gathering light that has reflected from the retinas of the user's eyes. Viewing comfort may be enhanced by adjusting display positions relative to the eye positions and/or by adjusting lens settings based on the content being presented on the display and/or measured refractive errors.

Abstract: A computing device retrieves a stabilized weight and a weight-based item count for one or more items to be purchased. Responsive to retrieving the stabilized weight, the computing device retrieves an image-based item count and an expected weight based on the image-based item count for the one or more items to be purchased. The computing device selects between authorizing and blocking checkout of the one or more items based on the weight-based item count, the image-based item count, the stabilized weight, and the expected weight.

Abstract: Systems and methods provide for an automated system for analyzing damage and processing claims associated with an insured item, such as a vehicle. An enhanced claims processing server may analyze damage associated with the insured item using photos/video transmitted to the server from a user device (e.g., a mobile device). The mobile device may receive feedback from the server regarding the acceptability of submitted photos/video, and if the server determines that any of the submitted photos/video is unacceptable, the mobile device may capture audio descriptions regarding the insured item. To aid in damage analysis, the server may also interface with various internal and external databases storing reference images of undamaged items and cost estimate information for repairing previously analyzed damages to similar items.

Abstract: Systems, processors and methods are disclosed for organizing processing datapaths to perform operations in parallel while executing a single program. Each datapath executes the same sequence of instructions, using a novel instruction sequencing method. Each datapath is implemented through a processor having a data memory partitioned into identical regions. A master processor fetches instructions and conveys them to the datapath processors. All processors are connected serially by an instruction pipeline, such that instructions are executed in parallel datapaths, with execution in each datapath offset in time by one clock cycle from execution in adjacent datapaths. The system includes an interconnection network that enables full sharing of data in both horizontal and vertical dimensions, with the effect of coupling any datapath to the memory of any other datapath without adding processing cycles in common usage.

Abstract: Methods and systems are disclosed for increased speed of processing operations on data in two-dimensional arrays, and for detecting a feature in an image. A method for detecting a feature in an image comprises storing, in a set of data memories within a parallel processing system, first image data representing pixels of a first image. The method further comprises storing, in a memory of a host processor coupled to the parallel processing system, feature kernel data representing a set of weight matrices. A method for increased speed of processing operations on data in two-dimensional arrays comprises storing, in a set of data memories within a parallel processing system, first array data representing elements of a first array. The method further comprises, for each of multiple selected elements within the first array, performing a processing operation on the selected element to produce an output element corresponding to the selected element.

Abstract: Systems, processors and methods are disclosed for organizing processing datapaths to perform operations in parallel while executing a single program. Each datapath executes the same sequence of instructions, using a novel instruction sequencing method. Each datapath is implemented through a processor having a data memory partitioned into identical regions. A master processor fetches instructions and conveys them to the datapath processors. All processors are connected serially by an instruction pipeline, such that instructions are executed in parallel datapaths, with execution in each datapath offset in time by one clock cycle from execution in adjacent datapaths. The system includes an interconnection network that enables full sharing of data in both horizontal and vertical dimensions, with the effect of coupling any datapath to the memory of any other datapath without adding processing cycles in common usage.

Abstract: Systems, processors and methods are disclosed for organizing processing datapaths to perform operations in parallel while executing a single program. Each datapath executes the same sequence of instructions, using a novel instruction sequencing method. Each datapath is implemented through a processor having a data memory partitioned into identical regions. A master processor fetches instructions and conveys them to the datapath processors. All processors are connected serially by an instruction pipeline, such that instructions are executed in parallel datapaths, with execution in each datapath offset in time by one clock cycle from execution in adjacent datapaths. The system includes an interconnection network that enables full sharing of data in both horizontal and vertical dimensions, with the effect of coupling any datapath to the memory of any other datapath without adding processing cycles in common usage.

Abstract: Methods, devices and systems are disclosed that interface a host computer to a specialized processor. In an embodiment, an instruction generation unit comprises attribute, decode, and instruction buffer stages. The attribute stage is configured to receive a host-program operation code and a virtual host-program operand from the host computer and to expand the virtual host-program operand into an operand descriptor. The decode stage is configured to receive the first operand descriptor and the host-program operation code, convert the host-program operation code to one or more decoded instructions for execution by the specialized processor, and allocate storage locations for use by the specialized processor. The instruction buffer stage is configured to receive the decoded instruction, place the one or more decoded instructions into one or more instruction queues, and issue decoded instructions from at least one of the one or more instruction queues for execution by the specialized processor.

Abstract: Methods and systems are disclosed for increased speed of processing operations on data in two-dimensional arrays, and for detecting a feature in an image. A method for detecting a feature in an image comprises storing, in a set of data memories within a parallel processing system, first image data representing pixels of a first image. The method further comprises storing, in a memory of a host processor coupled to the parallel processing system, feature kernel data representing a set of weight matrices. A method for increased speed of processing operations on data in two-dimensional arrays comprises storing, in a set of data memories within a parallel processing system, first array data representing elements of a first array. The method further comprises, for each of multiple selected elements within the first array, performing a processing operation on the selected element to produce an output element corresponding to the selected element.

Abstract: Traditionally, providing parallel processing within a multi-core system has been very difficult. Here, however, a system is provided where serial source code is automatically converted into parallel source code, and a processing cluster is reconfigured “on the fly” to accommodate the parallelized code based on an allocation of memory and compute resources. Thus, the processing cluster and its corresponding system programming tool provide a system that can perform parallel processing from a serial program that is transparent to a user. Generally, a control node connected to the address and data leads of a host processor uses messages to control the processing of data in a processing cluster. The cluster includes nodes of parallel processors, shared function memory, a global load/store, and hardware accelerators all connected to the control node by message busses. A crossbar data interconnect routes data to the cluster circuits separate from the message busses.

Abstract: Methods, devices and systems are disclosed that interface a host computer to a specialized processor. In an embodiment, an instruction generation unit comprises attribute, decode, and instruction buffer stages. The attribute stage is configured to receive a host-program operation code and a virtual host-program operand from the host computer and to expand the virtual host-program operand into an operand descriptor. The decode stage is configured to receive the first operand descriptor and the host-program operation code, convert the host-program operation code to one or more decoded instructions for execution by the specialized processor, and allocate storage locations for use by the specialized processor. The instruction buffer stage is configured to receive the decoded instruction, place the one or more decoded instructions into one or more instruction queues, and issue decoded instructions from at least one of the one or more instruction queues for execution by the specialized processor.

Abstract: Systems, processors and methods are disclosed for organizing processing datapaths to perform operations in parallel while executing a single program. Each datapath executes the same sequence of instructions, using a novel instruction sequencing method. Each datapath is implemented through a processor having a data memory partitioned into identical regions. A master processor fetches instructions and conveys them to the datapath processors. All processors are connected serially by an instruction pipeline, such that instructions are executed in parallel datapaths, with execution in each datapath offset in time by one clock cycle from execution in adjacent datapaths. The system includes an interconnection network that enables full sharing of data in both horizontal and vertical dimensions, with the effect of coupling any datapath to the memory of any other datapath without adding processing cycles in common usage.

Abstract: A communication system for providing world-wide, mobile Internet communication to a plurality of users and a method therefore. The system includes ground-based, multi-channel, radio frequency transmitting and receiving broadcasting grids that are capable of providing content to multiple users via cell towers and low-altitude, optical transmitting and receiving satellites that are in optical communication with the ground-based, multi-channel, RF transmitting and receiving broadcasting grids. The method includes transmitting optical and/or RF signals between at least one of the ground-based, multi-channel, RF transmitting and receiving broadcasting grids and at least one of the low-altitude, optical transmitting and receiving satellites.

Abstract: Systems, processors and methods are disclosed for organizing processing datapaths to perform operations in parallel while executing a single program. Each datapath executes the same sequence of instructions, using a novel instruction sequencing method. Each datapath is implemented through a processor having a data memory partitioned into identical regions. A master processor fetches instructions and conveys them to the datapath processors. All processors are connected serially by an instruction pipeline, such that instructions are executed in parallel datapaths, with execution in each datapath offset in time by one clock cycle from execution in adjacent datapaths. The system includes an interconnection network that enables full sharing of data in both horizontal and vertical dimensions, with the effect of coupling any datapath to the memory of any other datapath without adding processing cycles in common usage.

Abstract: Systems, processors and methods are disclosed for organizing processing datapaths to perform operations in parallel while executing a single program. Each datapath executes the same sequence of instructions, using a novel instruction sequencing method. Each datapath is implemented through a processor having a data memory partitioned into identical regions. A master processor fetches instructions and conveys them to the datapath processors. All processors are connected serially by an instruction pipeline, such that instructions are executed in parallel datapaths, with execution in each datapath offset in time by one clock cycle from execution in adjacent datapaths. The system includes an interconnection network that enables full sharing of data in both horizontal and vertical dimensions, with the effect of coupling any datapath to the memory of any other datapath without adding processing cycles in common usage.

Abstract: Systems, processors and methods are disclosed for organizing processing datapaths to perform operations in parallel while executing a single program. Each datapath executes the same sequence of instructions, using a novel instruction sequencing method. Each datapath is implemented through a processor having a data memory partitioned into identical regions. A master processor fetches instructions and conveys them to the datapath processors. All processors are connected serially by an instruction pipeline, such that instructions are executed in parallel datapaths, with execution in each datapath offset in time by one clock cycle from execution in adjacent datapaths. The system includes an interconnection network that enables full sharing of data in both horizontal and vertical dimensions, with the effect of coupling any datapath to the memory of any other datapath without adding processing cycles in common usage.

Abstract: A communication system for providing world-wide, mobile Internet communication to a plurality of users and a method therefore. The system includes ground-based, multi-channel, radio frequency transmitting and receiving broadcasting grids that are capable of providing content to multiple users via cell towers and low-altitude, optical transmitting and receiving satellites that are in optical communication with the ground-based, multi-channel, RF transmitting and receiving broadcasting grids. The method includes transmitting optical and/or RF signals between at least one of the ground-based, multi-channel, RF transmitting and receiving broadcasting grids and at least one of the low-altitude, optical transmitting and receiving satellites.

Abstract: A method of controlling inertial attitude of an artificial satellite in order to perform a navigation function and to maximize terrestrial coverage of the Earth by the satellite. The method includes deploying the artificial satellite in an orbit about the poles of the Earth; applying gyroscopic precession to the artificial satellite spin axis to precess and maintain the satellite near the ecliptic pole; deploying the artificial satellite so that the spin axis is initially perpendicular to or substantially perpendicular to sun lines; and applying gyroscopic precession to the artificial satellite spin axis to precess the spin axis away from an initial deployed attitude at a selectively-variable precession rate and to maintain the spin axis perpendicular to or substantially perpendicular to the sun lines.