Patents by Inventor William Mangione-Smith

William Mangione-Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070050608
    Abstract: Embodiments include a device, and a method. In an embodiment, a device includes a processor operable to execute an instruction set, a communications link exposed to an execution-optimization synthesizer and to the processor, and the execution-optimization synthesizer. The execution-optimization optimization synthesizer includes an execution-optimization synthesizer operable to collect data from the communications link that corresponds to an execution of at least one instruction of the instruction set, and generate an execution-optimization information utilizing the collected data from the communications link and corresponding to the execution of at least one instruction of the instruction set.
    Type: Application
    Filed: November 30, 2005
    Publication date: March 1, 2007
    Inventors: Bran Ferren, W. Hillis, William Mangione-Smith, Nathan Myhrvold, Clarence Tegreene, Lowell Wood
  • Publication number: 20070050607
    Abstract: Embodiments include a device, and a method. In an embodiment, a device includes an information store operable to save an execution-optimization information, a first processor, and a hardware circuit. The hardware circuit includes a hardware circuit for altering an execution of a program by the first processor in response to the execution-optimization information. The execution-optimization information created by a hardware device utilizing data collected from a second processor and corresponding to a previous runtime execution by the second processor of at least a portion of the program that was transparent to any software executing on the second processor.
    Type: Application
    Filed: November 30, 2005
    Publication date: March 1, 2007
    Inventors: Bran Ferren, W. Hillis, William Mangione-Smith, Nathan Myhrvold, Clarence Tegreene, Lowell Wood
  • Publication number: 20070050672
    Abstract: Embodiments include a system, an apparatus, a device, and a method. A system includes a power module operable to determine respective indicia of power consumed in executing at least one instruction by a first subcircuit and by a second subcircuit of a synchronous circuit. The system also includes a scheduler module operable to direct an execution task to a subcircuit selected from the first subcircuit and the second subcircuit. The subcircuit selection is responsive to the determined respective indicia of power consumption by the first subcircuit and by the second subcircuit.
    Type: Application
    Filed: March 28, 2006
    Publication date: March 1, 2007
    Inventor: William Mangione-Smith
  • Publication number: 20070050776
    Abstract: Embodiments include a device and a method. In an embodiment, a device includes a processor having an associated hardware resource and operable to execute an instruction group. The device also includes a resource manager operable to implement a resource management policy for the hardware resource with respect to an execution of the instruction group, the resource management policy responsive to a prediction of a future performance of the hardware resource based at least in part on a historical performance of the hardware resource.
    Type: Application
    Filed: August 29, 2005
    Publication date: March 1, 2007
    Inventors: Bran Ferren, W. Hillis, William Mangione-Smith, Nathan Myhrvold, Clarence Tegreene, Lowell Wood
  • Publication number: 20070050606
    Abstract: Embodiments include a device, and a method. In an embodiment, a device includes a microengine operatively coupled with a processor having an instruction set. The microengine includes a microengine operable gather data in a manner transparent to software executing on the processor and corresponding to a runtime execution of at least a portion of the instruction set by the processor. The microengine is also operable to create a runtime-based optimization profile utilizing the gathered dynamic data and which is useable in a subsequent execution of the at least of a portion of the instruction set by the processor.
    Type: Application
    Filed: November 30, 2005
    Publication date: March 1, 2007
    Inventors: Bran Ferren, W. Hillis, William Mangione-Smith, Nathan Myhrvold, Clarence Tegreene, Lowell Wood
  • Publication number: 20070050605
    Abstract: Embodiments include a device, apparatus, and a method. In an embodiment, an apparatus includes a first processor operable to execute a program. The apparatus also includes an information store configured by an execution-based optimization profile, the execution-based optimization profile usable in an execution of the program and that was created utilizing data collected during a runtime execution of the program by a second processor and transparent to software executing on the second processor. The apparatus further includes an execution-optimization circuit operable to alter an execution of the program by the first processor in response to the execution-based optimization profile.
    Type: Application
    Filed: December 30, 2005
    Publication date: March 1, 2007
    Inventors: Bran Ferren, W. Hillis, William Mangione-Smith, Nathan Myhrvold, Clarence Tegreene, Lowell Wood
  • Publication number: 20070050581
    Abstract: Embodiments include a system, an apparatus, a device, and a method. An apparatus includes a synchronous circuit including a first subcircuit powered by a first power plane having a first power plane voltage and a second subcircuit powered by a second power plane having a second power plane voltage. The apparatus also includes an error detector operable to detect an incidence of a computational error occurring in the first subcircuit. The apparatus includes a controller operable to change the first power plane voltage based upon the detected incidence of a computational error. The apparatus also includes a power supply configured to electrically couple with a portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller.
    Type: Application
    Filed: March 17, 2006
    Publication date: March 1, 2007
    Inventor: William Mangione-Smith
  • Publication number: 20070050609
    Abstract: Embodiments include a device, apparatus, and a method. A device includes an input circuit for receiving data corresponding to a runtime execution of a first instruction by a first processor having a first architecture. The device also includes a generator circuit for creating an execution-based optimization profile useable in an execution of a second instruction by a second processor having a second architecture.
    Type: Application
    Filed: January 31, 2006
    Publication date: March 1, 2007
    Inventors: Bran Ferren, W. Hillis, William Mangione-Smith, Nathan Myhrvold, Clarence Tegreene, Lowell Wood
  • Publication number: 20070050661
    Abstract: Embodiments include a controller apparatus, a computerized apparatus, a device, an apparatus, and a method. A controller-apparatus includes a monitoring circuit for detecting a computational error corresponding to an execution of an instruction of a sequence of instructions by a processor subsystem having an adjustable operating parameter. The controller apparatus also includes a recovery circuit for rolling back an execution of the sequence of instructions to a checkpoint in response to the detected computational error. The controller apparatus further includes a control circuit for adjusting the adjustable operating parameter in response to a performance criterion.
    Type: Application
    Filed: February 28, 2006
    Publication date: March 1, 2007
    Inventors: Bran Ferren, W. Hillis, William Mangione-Smith, Nathan Myhrvold, Clarence Tegreene, Lowell Wood
  • Publication number: 20070050604
    Abstract: Embodiments include a device, and a method. In an embodiment, a device includes a processor operable to execute an instruction set, and an execution-optimization circuit. The execution circuit includes an execution circuit for receiving an identification of a first instruction to be fetched from the instruction set for execution by the processor, and for pointing to a second instruction of the instruction set of the processor to be fetched for execution by the processor if indicated by an execution-based optimization profile. The execution-based optimization profile being previously derived by a hardware device utilizing data invisible to software and generated during a runtime execution of at least a portion of the instruction set. The execution-optimization circuit may include at least one of a microengine, a micro-programmed circuit, and/or a hardwired circuit.
    Type: Application
    Filed: November 30, 2005
    Publication date: March 1, 2007
    Inventors: Bran Ferren, W. Hillis, William Mangione-Smith, Nathan Myhrvold, Clarence Tegreene, Lowell Wood
  • Publication number: 20070050659
    Abstract: Embodiments include a computing system, a device, and a method. A computing system includes a processor subsystem having an adjustable operating parameter. The computing system also includes an information store operable to save a sequence of instructions. The computing system further includes a controller module. The controller module includes a monitor circuit for detecting an incidence of an operating-parameter-caused error corresponding to an execution of an instruction of the sequence of instructions by the processor subsystem. The controller further includes a control circuit for adjusting the adjustable operating parameter based upon an error-tolerant performance criterion.
    Type: Application
    Filed: February 28, 2006
    Publication date: March 1, 2007
    Inventors: Bran Ferren, W. Hillis, William Mangione-Smith, Nathan Myhrvold, Clarence Tegreene, Lowell Wood
  • Publication number: 20070050660
    Abstract: Embodiments include a computer processor-error controller, a computerized device, a device, an apparatus, and a method. A computer processor-error controller includes a monitoring circuit operable to detect a computational error corresponding to an execution of a second instruction by a processor operable to execute a sequence of program instructions that includes a first instruction that is fetched before the second instruction. The computer processor-error controller includes an error recovery circuit operable to restore an execution of the sequence of program instructions to the first instruction in response to the detected computational error.
    Type: Application
    Filed: February 28, 2006
    Publication date: March 1, 2007
    Inventors: Bran Ferren, W. Hillis, William Mangione-Smith, Nathan Myhrvold, Clarence Tegreene, Lowell Wood