Patents by Inventor William Max Coppock

William Max Coppock has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for providing a buried thin film resistor having end caps defined by a dielectric mask
    Patent number: 7808048
    Abstract: A buried thin film resistor having end caps defined by a dielectric mask is disclosed. A thin film resistor is formed on an integrated circuit substrate. A resistor protect layer is formed over the thin film resistor. A layer of dielectric material is formed over the resistor protect layer. The dielectric material is masked and dry etched to leave a first portion of dielectric material over a first end of the thin film resistor and a second portion of dielectric material over a second end of the thin film resistor. The resistor protect layer is then wet etched using the first and second portions of the dielectric material as a hard mask. Then a second dielectric layer is deposited and vias are etched down to the underlying portions of the resistor protect layer.
    Type: Grant
    Filed: October 15, 2007
    Date of Patent: October 5, 2010
    Assignee: National Semiconductor Corporation
    Inventors: Rodney Hill, Victor Torres, William Max Coppock, Richard W. Foote, Jr., Terry L. Lines, Tom Bold
  • System and method for controlling the formation of an interfacial oxide layer in a polysilicon emitter transistor
    Patent number: 7470594
    Abstract: A method is disclosed for controlling the formation of an interfacial oxide layer in a polysilicon emitter transistor device. The interfacial oxide layer is formed between an underlying substrate of single crystal silicon and an upper layer of polysilicon. The current gain and the emitter resistance of the transistor device are related to the thickness of the interfacial oxide layer. The oxide of the interfacial oxide layer is grown in a low pressure, low temperature pure oxygen (O2) environment that greatly reduces the oxidation rate. The low oxidation rate allows the thickness of the interfacial oxide layer to be precisely controlled and sources of variation to be minimized in the manufacturing process.
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: December 30, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Richard W. Foote, Jr., William Max Coppock, Darren Lee Rust, Charles A. Dark
  • System and method for providing a buried thin film resistor having end caps defined by a dielectric mask
    Patent number: 7332403
    Abstract: A buried thin film resistor having end caps defined by a dielectric mask is disclosed. A thin film resistor is formed on an integrated circuit substrate. A resistor protect layer is formed over the thin film resistor. A layer of dielectric material is formed over the resistor protect layer. The dielectric material is masked and dry etched to leave a first portion of dielectric material over a first end of the thin film resistor and a second portion of dielectric material over a second end of the thin film resistor. The resistor protect layer is then wet etched using the first and second portions of the dielectric material as a hard mask. Then a second dielectric layer is deposited and vias are etched down to the underlying portions of the resistor protect layer.
    Type: Grant
    Filed: July 11, 2005
    Date of Patent: February 19, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Rodney Hill, Victor Torres, William Max Coppock, Richard W. Foote, Jr., Terry L. Lines, Tom Bold