Patents by Inventor William N. Gallas

William N. Gallas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140330995
    Abstract: In an embodiment, a storage device may include a tangible non-transitory physical storage for storing information. The storage device may also include an interface. The interface may be used to receive a signal that may be associated with one of a plurality of different protocols. The signal may be received serially. The storage device may include circuitry which may be used to identify a protocol associated with the received signal. The protocol may be identified based on an attribute associated with the received signal. Alternatively or in addition to, the protocol may be identified based on information encoded in the received signal. The information encoded in the received signal may include, for example, a data header that may be associated with the protocol.
    Type: Application
    Filed: May 2, 2014
    Publication date: November 6, 2014
    Inventors: Paul S. Levy, William N. Gallas, John Huie
  • Publication number: 20030061462
    Abstract: A network-distributed memory mapping system for a network. The system includes a memory having a look-up table that provides for memory mapping of network addresses to the memory by enabling redirection of memory requests to the network addresses. The system also includes a network processor to control and execute the memory mapping of the network addresses.
    Type: Application
    Filed: September 26, 2001
    Publication date: March 27, 2003
    Inventors: James D.M. Fister, William N. Gallas
  • Patent number: 5815372
    Abstract: An electrical arrangement including a circuitized substrate, the circuitized substrate having (i) a first substrate surface including a set of substrate contacts disposed thereon, and (ii) a second substrate surface including a set of input/output contacts disposed thereon. The electrical arrangement also includes a first die having (i) a first die surface including a set of first die contacts disposed thereon which is coupled to a first portion of the set of substrate contacts, and (ii) a second die surface configured to receive a second die. In the electrical arrangement, the set of substrate contacts includes a second portion of substrate contacts configured to be coupled to a set of second die contacts disposed on the second die and the circuitized substrate electrically interconnects the first portion and second portion of the set of substrate contacts and the set of input/output contacts to form a predetermined circuit.
    Type: Grant
    Filed: March 25, 1997
    Date of Patent: September 29, 1998
    Assignee: Intel Corporation
    Inventor: William N. Gallas