Abstract: A method of making a printed circuit board panel, a printed circuit board panel made according to the method, and a system incorporating a printed circuit board provided onto the panel. The printed circuit board panel has a panel top edge, a panel bottom edge parallel to the panel top edge, and two parallel panel side edges, and further includes a first set of fiber bundles extending at the predetermined angle with respect to the panel side edges, and a second set of fiber bundles extending at the predetermined angle with respect to the panel top edge.

Abstract: A method of making a printed circuit board panel, a printed circuit board panel made according to the method, and a system incorporating a printed circuit board provided onto the panel. The printed circuit board panel has a panel top edge, a panel bottom edge parallel to the panel top edge, and two parallel panel side edges, and further includes a first set of fiber bundles extending at the predetermined angle with respect to the panel side edges, and a second set of fiber bundles extending at the predetermined angle with respect to the panel top edge.

Abstract: A method of making a printed circuit board panel, a printed circuit board panel made according to the method, and a system incorporating a printed circuit board provided onto the panel. The printed circuit board panel has a panel top edge, a panel bottom edge parallel to the panel top edge, and two parallel panel side edges, and further includes a first set of fiber bundles extending at the predetermined angle with respect to the panel side edges, and a second set of fiber bundles extending at the predetermined angle with respect to the panel top edge.

Abstract: The invention provides an optical connection between a component on a printed circuit board (“PCB”) and an optical fiber embedded in the PCB. By optically connecting the component with the optical fiber, the component may use the optical fiber for high speed optical data communication.

Abstract: A novel HDI board that enables test probe access comprises a stack of insulating layers having a first surface and a second surface, wherein the first surface includes at least two devices and the second surface includes a test probe accessible solder bead. The two devices are electrically coupled by at least one metal interconnect formed within the plurality of insulating layers. The HDI board also includes a backside ?Via electrically coupling the solder bead to the metal interconnect. Testing of the device may be carried out by way of the solder bead and the backside ?Via.

Abstract: The invention provides an optical connection between a component on a printed circuit board (“PCB”) and an optical fiber embedded in the PCB. By optically connecting the component with the optical fiber, the component may use the optical fiber for high speed optical data communication.

Abstract: The invention provides an optical connection between a component on a printed circuit board (“PUB”) and an optical fiber embedded in the PCB. By optically connecting the component with the optical fiber, the component may use the optical fiber for high speed optical data communication.

Abstract: A method, apparatus, and system for a printed circuit board (PCB) and package with an embedded air dielectric includes a conductor formed on a surface of a first core layer, a conductor layer overlaying an inner surface of a cavity formed in a second core layer, the conductor layer opposing the conductor, and a sealed air channel between and separating the conductor and the conductor layer from contacting each other. A gas in the sealed air channel provides a primary dielectric therein. The gas may be air.

Abstract: A method and apparatus for reducing timing skew between conductor traces. A dielectric medium made of a resin reinforced with a fabric is provided. The fabric includes a first plurality of yarns running parallel to a first axis and a second plurality of yarns running parallel to a second axis. The first plurality of yarns are separated by a first weave pitch and the second plurality of yarns separated by a second weave pitch. At least two conductor traces are formed on the dielectric medium. The conductor traces are positioned on the dielectric medium such that the conductor traces each have substantially similar effective dielectric constants.

Abstract: A compressible domed contact used as a portion of socket contact within an electrical socket to eliminate co-planarity issues and to achieve an effective electrical connection between the electrical socket and a microelectronic device. The compressible domed contact may be made of resilient material such that it will substantially return to its original shape after being compressed.

Abstract: A compressible domed contact used as a portion of socket contact within an electrical socket to eliminate co-planarity issues and to achieve an effective electrical connection between the electrical socket and a microelectronic device. The compressible domed contact may be made of resilient material such that it will substantially return to its original shape after being compressed.

Abstract: A method and apparatus for reducing timing skew between conductor traces. A dielectric medium made of a resin reinforced with a fabric is provided. The fabric includes a first plurality of yarns running parallel to a first axis and a second plurality of yarns running parallel to a second axis. The first plurality of yarns are separated by a first weave pitch and the second plurality of yarns separated by a second weave pitch. At least two conductor traces are formed on the dielectric medium. The conductor traces are positioned on the dielectric medium such that the conductor traces each have substantially similar effective dielectric constants.

Abstract: An I/O routing pattern method is disclosed, for use with heterogeneous printed circuit boards (PCBs), such as those embedded with a reinforcement material, for example, a fiberglass weave. Traces are routed on the PCB so as to reduce sensitivity to changes in the dielectric constant (Dk), which are brought about by the strands of reinforcement material contained within the PCB laminate. The method minimizes the local variations, such as the Dk, time of flight, and capacitance variations, that are observed with traditional routing methods on heterogeneous PCBs.

Abstract: An apparatus for receiving a microchip and having a conductor buses therein. A top surface of the apparatus receives the microchip while the bottom surface is to mount to a circuit board. A plurality of pin receptacles pass through the top surface to receive a corresponding plurality of microchip pins of the microchip. The conductor bus resides at least in part between the top surface and the bottom surface and is electrically coupled to a first plurality of the plurality of the pin receptacles.

Abstract: A method is provided for forming a waveguide in a printed circuit board. This may include forming a trench in a printed circuit board substrate and forming at least one metalized surface along the trench. A metalized capping surface may be provided over the trench so as to form the waveguide structure.

Abstract: An I/O routing pattern method is disclosed, for use with heterogeneous printed circuit boards (PCBs), such as those embedded with a reinforcement material, for example, a fiberglass weave. Traces are routed on the PCB so as to reduce sensitivity to changes in the dielectric constant (Dk), which are brought about by the strands of reinforcement material contained within the PCB laminate. The method minimizes the local variations, such as the Dk, time of flight, and capacitance variations, that are observed with traditional routing methods on heterogeneous PCBs.

Abstract: A method and apparatus for reducing timing skew between conductor traces. A dielectric medium made of a resin reinforced with a fabric is provided. The fabric includes a first plurality of yarns running parallel to a first axis and a second plurality of yarns running parallel to a second axis. The first plurality of yarns are separated by a first weave pitch and the second plurality of yarns separated by a second weave pitch. At least two conductor traces are formed on the dielectric medium. The conductor traces are positioned on the dielectric medium such that the conductor traces each have substantially similar effective dielectric constants.

Abstract: An apparatus for receiving a microchip and having a conductor buses therein. A top surface of the apparatus receives the microchip while the bottom surface is to mount to a circuit board. A plurality of pin receptacles pass through the top surface to receive a corresponding plurality of microchip pins of the microchip. The conductor bus resides at least in part between the top surface and the bottom surface and is electrically coupled to a first plurality of the plurality of the pin receptacles.

Abstract: A method is provided for forming a waveguide in a printed circuit board. This may include forming a trench in a printed circuit board substrate and forming at least one metalized surface along the trench. A metalized capping surface may be provided over the trench so as to form the waveguide structure.