Abstract: A system for analyzing images represented by a serial stream of digital electrical signals corresponding to values of pixels in a matrix of points constituting an image. The system includes a pipeline of substantially identical neighborhood transformation stages. Each stage includes a processor portion for analyzing the pixel values and a memory portion communicating with the processor portion for sequentially providing a window of neighboring pixels to the processor for analysis. A central programmable controller communicates with the pipeline over a single communication link which provides both the pixel value data to the pipeline and transformation control instructions to the processor portions of each stage. The memory portion preferably includes a random access memory which serves as a line storage device which may be readily adjusted to accommodate different raster scan line lengths from various image sensors.

Abstract: Dynamic data generator circuitry is disclosed for use in an image analyzer system. The system includes a plurality of storage devices for temporarily storing a neighborhood in the image matrix comprised of a central data point and its surrounding points in the matrix. A transformation generator includes neighborhood contribution circuitry for operating on the values of each point in the neighborhood when they are loaded in the storage devices. The maximum value associated with any of the adjusted points in the neighborhood is provided as a transformation output signal. To aid in the maximum value selection process, the value of the central data point in the neighborhood is sensed and used to provide a correction value so that all of the adjusted data points in the neighborhood are within a particular range of values so that the maximum value selection circuitry may accurately identify the data point in the neighborhood truly having the maximum value associated with the image.

Abstract: An image analyzer system includes a pipeline of individually programmable neighborhood transformation stages. Programming of the stages is accomplished by way of coded command signals which are either of a local or global type. Global commands propagate down the pipeline to all of the stages whereas local commands are utilized to program only selected stages. Once the stages are programmed the image data may be transferred over the same bus previously utilized to carry the programming instructions. In the preferred embodiment, control lines are employed to indicate whether image data or programming instructions are being transferred over the bus.

Abstract: An image analyzer system and a method of analyzing image information contained in serial scan lines of pixels in which some of the pixels have valid data values representing image information while other pixels have invalid data values not representing characteristics of the image to be analyzed. Off image detector circuitry is utilized to generate output signals to neighborhood transformation logic when one or more pixels in a neighborhood contain invalid values. Preferably, the off image detector means monitors the status of a control line which indicates whether valid or invalid pixels are being transferred over a bus to a stage of the image analyzer system. The detector circuitry operates to store the number of valid pixels in subsequent scan lines presented to the stage. This comparison is utilized to detect invalid pixel values which may be contained in each neighborhood.

Abstract: An image analyzer system employs one or more neighborhood transformation stages. The stage operates to access groups of neighboring pixels in an image matrix, analyzes them and generates a transformation output as a result of the analysis. The stage includes a logic circuit which is programmable from a central controller. In the preferred embodiment, each pixel in the neighborhood is analyzed by the logic circuit and temporarily stored until other pixels in the group have been analyzed. The combination of analyzed pixel values form the basis for generating the transformation output for the stage. Preferably, the logic circuit is designed to perform both two dimensional and three dimensional image analyses.

Abstract: Dynamic data generator circuitry is disclosed for use in an image analyzer system. The system includes a plurality of storage devices for temporarily storing a neighborhood in the image matrix comprised of a central data point and its surrounding points in the matrix. A transformation generator includes neighborhood contribution circuitry for operating on the values of each point in the neighborhood when they are loaded in the storage devices. The maximum value associated with any of the adjusted points in the neighborhood is provided as a transformation output signal. To aid in the maximum value selection process, the value of the central data point in the neighborhood is sensed and used to provide a correction value so that all of the adjusted data points in the neighborhood are within a particular range of values so that the maximum value selection circuitry may accurately identify the data point in the neighborhood truly having the maximum value associated with the image.