Patents by Inventor William O. Shreeve

William O. Shreeve has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5520327
    Abstract: An electronic thermostat having a safety feature includes a controller which sends control signals to circuitry used for activating a system for conditioning air. The control signals are used to control the active state of the system for conditioning air. Furthermore, safety cutoff circuitry is incorporated into the thermostat whereby the safety cutoff circuitry is used to override the control signal sent from the controller when a predetermined temperature is reached in the space being heated or cooled.
    Type: Grant
    Filed: September 23, 1994
    Date of Patent: May 28, 1996
    Assignee: Carrier Corporation
    Inventors: William O. Shreeve, Thomas W. Essig
  • Patent number: 5467921
    Abstract: An electronic thermostat having a short circuit protection feature has a controller which sends control signals to circuitry used for activating and deactivating a system for conditioning air. Short circuit protection circuitry monitors the circuitry within the thermostat and indicates to the controller when a short circuit has occurred. When a short circuit is detected, the controller sets its control signal to deactivate the system for conditioning air for a predetermined period of time.
    Type: Grant
    Filed: September 23, 1994
    Date of Patent: November 21, 1995
    Assignee: Carrier Corporation
    Inventors: William O. Shreeve, Laurie L. Werbowsky, Thomas W. Essig
  • Patent number: 5291496
    Abstract: An internally fault-tolerant data error detection and correction integrated circuit device (10) and a method of operating same. The device functions as a bidirectional data buffer between a 32-bit data processor and the remainder of a data processing system and provides a 32-bit datum is provided with a relatively short eight bits of data-protecting parity. The 32-bits of data by eight bits of parity is partitioned into eight 4-bit nibbles and two 4-bit nibbles, respectively. For data flowing towards the processor the data and parity nibbles are checked in parallel and in a single operation employing a dual orthogonal basis technique. The dual orthogonal basis increase the efficiency of the implementation. Any one of ten (eight data, two parity) nibbles are correctable if erroneous, or two different erroneous nibbles are detectable. For data flowing away from the processor the appropriate parity nibble values are calculated and transmitted to the system along with the data.
    Type: Grant
    Filed: October 18, 1990
    Date of Patent: March 1, 1994
    Assignee: The United States of America as represented by the United States Department of Energy
    Inventors: David D. Andaleon, Leonard M. Napolitano, Jr., G. Robert Redinbo, William O. Shreeve
  • Patent number: D359459
    Type: Grant
    Filed: June 27, 1994
    Date of Patent: June 20, 1995
    Assignee: Carrier Corporation
    Inventors: Joseph C. Summa, William O. Shreeve, Mark D. Dziersk