Patents by Inventor William P. Byrne

William P. Byrne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5607284
    Abstract: A tip shroud assembly comprising a segmented annular shroud, each segment comprising an first arcuate member having a first radially inner surface and a circumferentially extending channel extending radially outward therefrom, and a second arcuate member received within the channel in spaced relation to the first arcuate member thereby defining a circumferentially extending passage therebetween, and a plurality of baffles located in the passage, each baffle extending from the first arcuate member to the second arcuate member.
    Type: Grant
    Filed: December 29, 1994
    Date of Patent: March 4, 1997
    Assignee: United Technologies Corporation
    Inventors: William P. Byrne, Nick A. Nolcheff
  • Patent number: 5474417
    Abstract: A tip shroud assembly comprising a segmented annular shroud, each segment comprising first, second and third arcuate members and a plurality of vane walls integral with the first second and third members, and each arcuate member has a radially inner surface, and the third arcuate member is in spaced relation to the first and second members, and each vane wall spans between the radially inner surface of the third arcuate member and the radially inner surfaces of the first and second members.
    Type: Grant
    Filed: December 29, 1994
    Date of Patent: December 12, 1995
    Assignee: United Technologies Corporation
    Inventors: John D. Privett, William P. Byrne, Nick A. Nolcheff
  • Patent number: 3931574
    Abstract: This invention is directed to a test module for and method of testing integrated circuit connections (i.e., wire wrap, multilayer printed circuit boards, etc.) to determine whether or not the circuits are correctly wired and whether or not there are any short circuits or broken connections, as well as any other electrical problems. The system confirms the validity of the electrical interconnections by a visual comparison of the lighted light emitting diodes and the assembly plan; if the correct comparison is not made, an error in the manufacturing process is indicated. Failure of any of the expected light emitting diodes to light indicates missing or electrically bad connections; extra lighted light emitting diodes indicate extraneous connections or short circuits on the board.
    Type: Grant
    Filed: November 19, 1974
    Date of Patent: January 6, 1976
    Inventors: Ralph W. Curtis, Jr., William P. Byrne, Alan G. Pezzulich