Patents by Inventor William P. Pardee

William P. Pardee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Planarizing interposer for thermal compensation of a probe card
    Patent number: 6756797
    Abstract: A probe card assembly that compensates for differing rates of thermal expansion is disclosed herein. The assembly is comprised of a multi-layered dielectric plate interposed between a probe head and a printed circuit board. The printed circuit board has arrayed upon its surface a first plurality of electrical contacts arranged in a pattern. The dielectric plate has a second plurality of electrical contacts arranged in a pattern matching the first plurality of contacts. A planarizing interposer is interposed between the plate and the printed circuit board and has a pattern of holes matching the pattern of electrical contacts on the printed circuit board and plate. The assembly further includes a plurality of electrical connectors disposed within each of the holes arrayed in a pattern upon the planarizing interposer a plurality conductive bumps or fuzz buttons making electrical contact with the first and second plurality of electrical contacts.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: June 29, 2004
    Assignee: Wentworth Laboratories Inc.
    Inventors: Alexander Brandorff, William P. Pardee
  • Planarizing interposer
    Publication number: 20020109514
    Abstract: A probe card assembly that compensates for differing rates of thermal expansion is disclosed herein. The assembly is comprised of a multi-layered dielectric plate interposed between a probe head and a printed circuit board. The printed circuit board has arrayed upon its surface a first plurality of electrical contacts arranged in a pattern. The dielectric plate has a second plurality of electrical contacts arranged in a pattern matching the first plurality of contacts. A planarizing interposer is interposed between the plate and the printed circuit board and has a pattern of holes matching the pattern of electrical contacts on the printed circuit board and plate. The assembly further includes a plurality of electrical connectors disposed within each of the holes arrayed in a pattern upon the planarizing interposer a plurality conductive bumps or fuzz buttons making electrical contact with the first and second plurality of electrical contacts.
    Type: Application
    Filed: January 29, 2002
    Publication date: August 15, 2002
    Applicant: Wentworth Laboratories, Inc.
    Inventors: Alexander Brandorff, William P. Pardee