Abstract: A magnetic sensor array device is described that is constructed with multiple single sensor die, diced out of a wafer as a group and packaged in a wafer level package (WLP). The device comprises an array of multi-axis magnetic sensors that can measure the multi-dimensional magnetic field of an arbitrary sized two-dimensional region with high spatial resolution, reduced sensing distance, higher measurement throughput, tolerance to motion, improved temperature measurement, and improved yield when placed on a circuit card comprises part of an authentication system including a physical unclonable function (“PUF”), a substrate, a plurality of magnetized particles randomly dispersed in the substrate, and a PUF reader constructed using one or more of the magnetic sensor array devices wherein the PUF reader measures the magnetic field at multiple locations in close proximity to the magnetized particles. The measured magnetic field data may be compared to previously enrolled data to assess authenticity.

Abstract: A magnetic sensor array device is described that is constructed with multiple sensors integrated on a common silicon die, diced and packaged in a wafer level package (WLP). The device comprises an array of multi-axis magnetic sensors that can measure the multi-dimensional magnetic field of an arbitrary sized two-dimensional region with high spatial resolution, reduced sensing distance, higher measurement throughput, tolerance to motion, improved temperature measurement, and improved yield when placed on a circuit card comprises part of an authentication system including a physical unclonable function (“PUF”), a substrate, a plurality of magnetized particles randomly dispersed in the substrate, and a PUF reader constructed using one or more of the magnetic sensor array devices wherein the PUF reader measures the magnetic field at multiple locations in close proximity to the magnetized particles. The measured magnetic field data may be compared to previously enrolled data to assess authenticity.

Abstract: A system for use in authentication processes is described comprising a physical unclonable function (“PUF”), a substrate, a plurality of magnetized particles randomly dispersed in the substrate, a PUF reader constructed using multiple discrete magnetometer chips that have magnetic field sensors, placed on a circuit card in an array with a sufficient center to center spacing between sensing elements of adjacent magnetometer chips, wherein the PUF reader measures the magnetic field data at multiple locations in close proximity to the magnetized particles. The measured magnetic field data may be compared to previously enrolled data to assess authenticity.

Abstract: A system for use in authentication processes is described comprising a physical unclonable function (“PUF”), a substrate, a plurality of magnetized particles randomly dispersed in the substrate, a PUF reader constructed using multiple discrete magnetometer chips that have magnetic field sensors, placed on a circuit card in an array with a sufficient center to center spacing between sensing elements of adjacent magnetometer chips, wherein the PUF reader measures the magnetic field data at multiple locations in close proximity to the magnetized particles. The measured magnetic field data may be compared to previously enrolled data to assess authenticity.

Abstract: An imaging device has a photoconductor with a surface that is selectively discharged by a light from a laser diode to create a latent electrostatic image for attracting toner for transfer to a media. A circuit drives the laser diode. The circuit has a switch for turning on and off the light, a resistor complementary to the laser diode selectively connectable to the switch, and a passive circuit component coupled to the laser diode. The passive circuit component is a delay line, inductor, choke, coiled wire, or ferrite bead is contemplated. It may also typify a length of copper tracing on a printed circuit board that supports the laser diode. The circuit causes an initial overshoot voltage spike in an on voltage pulse that is about 20% or more than the settled on voltage. The voltage spike dampens out in about one-fourth of a total voltage on time of the pulse.

Abstract: An imaging device has a photoconductor with a surface that is selectively discharged by a light from a laser diode to create a latent electrostatic image for attracting toner for transfer to a media. A circuit drives the laser diode. The circuit has a switch for turning on and off the light, a resistor complementary to the laser diode selectively connectable to the switch, and a passive circuit component coupled to the laser diode. The passive circuit component is a delay line, inductor, choke, coiled wire, or ferrite bead is contemplated. It may also typify a length of copper tracing on a printed circuit board that supports the laser diode. The circuit causes an initial overshoot voltage spike in an on voltage pulse that is about 20% or more than the settled on voltage. The voltage spike dampens out in about one-fourth of a total voltage on time of the pulse.

Abstract: A scanning system for use in an imaging apparatus includes a first light source and a second light source for emitting light beams for generating an image. A driver circuitry has first and second outputs connected to the first and second light sources, respectively, for controlling the first and second light sources. A signal transmitter includes a first interface for communicating a clock signal to the driver circuitry and a second interface for communicating an image information signal to the driver circuitry. During a clock cycle of the clock signal, the driver circuitry captures a first bit information from the image information signal at a rising edge of the clock signal and a second bit information from the image information signal at a falling edge of the clock signal. Thereafter, the driver circuitry drives the first and second light sources based on the first and second bit information captured, respectively.

Abstract: It is determined that a memory pressure condition exists which limits how many active processes are allowed. There is generated and stored of a set of values corresponding to parameters for each process where the parameters are related to priority factors assigned to the associated process. There is calculated a prioritization score for each process based on the corresponding set of values. There is determined a first active process with the lowest priority based on the prioritization scores. The first active process is deactivated to reduce the memory pressure condition.

Abstract: A scanning system for use in an imaging apparatus includes a first light source and a second light source for emitting light beams for generating an image. A driver circuitry has first and second outputs connected to the first and second light sources, respectively, for controlling the first and second light sources. A signal transmitter includes a first interface for communicating a clock signal to the driver circuitry and a second interface for communicating an image information signal to the driver circuitry. During a clock cycle of the clock signal, the driver circuitry captures a first bit information from the image information signal at a rising edge of the clock signal and a second bit information from the image information signal at a falling edge of the clock signal. Thereafter, the driver circuitry drives the first and second light sources based on the first and second bit information captured, respectively.

Abstract: In an embodiment of the invention, an apparatus and method for a target thread selection in a multi-threaded process perform the steps of receiving a signal that may or may not be masked by threads in the process; and searching a thread subset for a target thread that can handle the signal. A signal daemon may search for the target thread if the target thread is not found in the thread subset.

Abstract: An embodiment of the invention provides a concrete data type and a method for providing a cached chunked list concrete data type. The method can perform steps including: storing at least one datum in a chunk in a cache line; and setting a lower bit value (LB) in a link/space pointer in the chunk to indicate the empty slots in the chunk.

Abstract: A boot validation system and method may be used in a computer system to validate boot code before allowing the computer system to execute the boot code. In particular, a secure hash algorithm may be used to compute a hash value of the boot code and the computed hash value may be compared to a preprogrammed hash value stored in a secure non-volatile device. If the hash values match the boot code may be validated and the system may then be allowed to execute the boot code. Once the boot code is validated, the boot code may be executed to validate other code (e.g., firmware) in the computer system. In an exemplary embodiment, the boot validation system and method may be used in an imaging device, such as a printer.

Abstract: An embodiment of the invention provides a concrete data type and a method for providing a cached chunked list concrete data type. The method can perform steps including: storing at least one datum in a chunk in a cache line; and setting a lower bit value (LB) in a link/space pointer in the chunk to indicate the empty slots in the chunk.

Abstract: A method of allocating memory and a memory allocation apparatus are described. The method comprises allocating a set of memory locations for at least a portion of a data structure, wherein the allocated set comprises memory space storing a counter corresponding to each memory location in the set. A method of traversing a data structure is described. The method comprises incrementing, by a predetermined value, a reference address of a pointer to a first data structure of a portion of a set of allocated memory locations to obtain a reference address to a second data structure in the portion of the set. The portion of the set of allocated memory locations comprises a counter for each allocated memory location.

Abstract: A method of handling a signal for delivery to a process in a process group along with an apparatus and computer-readable medium storing instructions therefore are described. The method comprises obtaining a lock on a portion of a process group management structure and storing a signal to the process group management structure, wherein the signal is to be delivered to one or more processes of a process group, wherein an operating system manages the process group management structure. The method further comprises transmitting a wakeup signal to a signal daemon and releasing the obtained lock. A method of delivering a signal to a process in a process group is also described. The method comprises obtaining a signal from a process group management structure, obtaining a lock on a process list, transmitting the signal to a process specified in the process list; and releasing the lock on the process list.

Abstract: A boot validation system and method may be used in a computer system to validate boot code before allowing the computer system to execute the boot code. In particular, a secure hash algorithm may be used to compute a hash value of the boot code and the computed hash value may be compared to a preprogrammed hash value stored in a secure non-volatile device. If the hash values match the boot code may be validated and the system may then be allowed to execute the boot code. Once the boot code is validated, the boot code may be executed to validate other code (e.g., firmware) in the computer system. In an exemplary embodiment, the boot validation systems and method may be used in an imaging device, such as a printer.

Abstract: In an embodiment of the invention, an apparatus and method for a target thread selection in a multi-threaded process perform the steps of receiving a signal that may or may not be masked by threads in the process; and searching a thread subset for a target thread that can handle the signal. A signal daemon may search for the target thread if the target thread is not found in the thread subset.

Abstract: A boot validation system and method may be used in a computer system to validate boot code before allowing the computer system to execute the boot code. In particular, a secure hash algorithm may be used to compute a hash value of the boot code and the computed hash value may be compared to a preprogrammed hash value stored in a secure non-volatile device. If the hash values match the boot code may be validated and the system may then be allowed to execute the boot code. Once the boot code is validated, the boot code may be executed to validate other code (e.g., firmware) in the computer system. In an exemplary embodiment, the boot validation systems and method may be used in an imaging device, such as a printer.

Abstract: It is determined that an amount of total memory utilized by active processes exceeds a memory pressure threshold. There is deactivated at least one active process occupying space in the total memory during a first system cycle based on said determination. There is deactivated a number N of active processes during succeeding system cycles while the memory pressure threshold is exceeded, where N increases at a non-linear rate during each system cycle until the total memory utilized by active processes does not exceed the memory pressure threshold.

Abstract: It is determined that a memory pressure condition exists which limits how many active processes are allowed. There is generated and stored of a set of values corresponding to parameters for each process where the parameters are related to priority factors assigned to the associated process. There is calculated a prioritization score for each process based on the corresponding set of values. There is determined a first active process with the lowest priority based on the prioritization scores. The first active process is deactivated to reduce the memory pressure condition.