Patents by Inventor William Polinsky

William Polinsky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7846776
    Abstract: Methods for releasably attaching sacrificial support members to microfeature workpieces and microfeature devices formed using such methods are disclosed herein. One embodiment, for example, is directed to a method for processing a microfeature workpiece releasably attached to a first support member. The workpiece includes a microelectronic substrate, a plurality of microelectronic dies on and/or in the substrate, and a sacrificial support member attached to an active side of the substrate. The method can include separating individual dies from the workpiece by cutting through the sacrificial support member and the substrate while the workpiece is attached to the first support member. The method can also include attaching a singulated die and corresponding portion of the sacrificial support member as a unit to a second support member.
    Type: Grant
    Filed: August 17, 2006
    Date of Patent: December 7, 2010
    Assignee: Micron Technology, Inc.
    Inventors: William A. Polinsky, Michael B. Ball
  • Publication number: 20080044985
    Abstract: Methods for releasably attaching sacrificial support members to microfeature workpieces and microfeature devices formed using such methods are disclosed herein. One embodiment, for example, is directed to a method for processing a microfeature workpiece releasably attached to a first support member. The workpiece includes a microelectronic substrate, a plurality of microelectronic dies on and/or in the substrate, and a sacrificial support member attached to an active side of the substrate. The method can include separating individual dies from the workpiece by cutting through the sacrificial support member and the substrate while the workpiece is attached to the first support member. The method can also include attaching a singulated die and corresponding portion of the sacrificial support member as a unit to a second support member.
    Type: Application
    Filed: August 17, 2006
    Publication date: February 21, 2008
    Applicant: Micron Technology, Inc.
    Inventors: William A. Polinsky, Michael B. Ball
  • Publication number: 20070278611
    Abstract: A modified facet etch is disclosed to prevent blown gate oxide and increase etch chamber life. The modified facet etch is a two-stage process. The first stage is a plasma sputter etch to form a facet profile. The first stage etch is terminated prior to reaching the target depth for the etching process. The second stage etch is a reactive ion etch which directionally follows the facet profile to reach the target depth.
    Type: Application
    Filed: August 16, 2007
    Publication date: December 6, 2007
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: William Polinsky, Thomas Kari, Mark Bossler
  • Patent number: 7273817
    Abstract: A method is provided for forming polymer on an interior surface of a reaction chamber. A polymer-forming gas is introduced into the chamber during the etching of a photoresist layer of a semiconductor wafer within the reaction chamber and the environment is regulated to form the polymer on the interior surface of the chamber. The polymer thus formed reduces the standard deviation of the critical dimensions of the semiconductor wafer. A method for the manufacture of integrated circuits is also provided.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: September 25, 2007
    Assignee: Micron Technology, Inc.
    Inventors: William A. Polinsky, Bill Crane, John C. Gonzales, Steven Ott
  • Patent number: 7262136
    Abstract: A modified facet etch is disclosed to prevent blown gate oxide and increase etch chamber life. The modified facet etch is a two-stage process. The first stage is a plasma sputter etch to form a facet profile. The first stage etch is terminated prior to reaching the target depth for the etching process. The second stage etch is a reactive ion etch which directionally follows the facet profile to reach the target depth.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: August 28, 2007
    Assignee: Micron Technology, Inc.
    Inventors: William A. Polinsky, Thomas S. Kari, Mark A. Bossler
  • Publication number: 20060202394
    Abstract: A method is provided for forming polymer on an interior surface of a reaction chamber. A polymer-forming gas is introduced into the chamber during the etching of a photoresist layer of a semiconductor wafer within the reaction chamber and the environment is regulated to form the polymer on the interior surface of the chamber. The polymer thus formed reduces the standard deviation of the critical dimensions of the semiconductor wafer. A method for the manufacture of integrated circuits is also provided.
    Type: Application
    Filed: November 14, 2005
    Publication date: September 14, 2006
    Inventors: William Polinsky, Bill Crane, John Gonzales, Steven Ott
  • Patent number: 7022620
    Abstract: A method is provided for forming polymer on an interior surface of a reaction chamber. A polymer-forming gas is introduced into the chamber and the environment is regulated to form the polymer on the interior surface of the chamber. Methods for the manufacture of integrated circuits, electronic devices, and electronic systems, are also provided.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: April 4, 2006
    Assignee: Micron Technology, Inc.
    Inventors: William A. Polinsky, Bill Crane, John C. Gonzales, Steven Ott
  • Publication number: 20050106891
    Abstract: A method is provided for forming polymer on an interior surface of a reaction chamber. A polymer-forming gas is introduced into the chamber and the environment is regulated to form the polymer on the interior surface of the chamber. Methods for the manufacture of integrated circuits, electronic devices, and electronic systems, are also provided.
    Type: Application
    Filed: November 18, 2003
    Publication date: May 19, 2005
    Inventors: William Polinsky, Bill Crane, John Gonzales, Steven Ott
  • Publication number: 20040248355
    Abstract: A modified facet etch is disclosed to prevent blown gate oxide and increase etch chamber life. The modified facet etch is a two-stage process. The first stage is a plasma sputter etch to form a facet profile. The first stage etch is terminated prior to reaching the target depth for the etching process. The second stage etch is a reactive ion etch which directionally follows the facet profile to reach the target depth.
    Type: Application
    Filed: July 8, 2004
    Publication date: December 9, 2004
    Inventors: William A. Polinsky, Thomas S. Kari, Mark A. Bossler
  • Patent number: 6762125
    Abstract: A modified facet is disclosed to prevent blown gate oxide and increase etch chamber life. The modified facet etch is a two-stage process. The first stage is a plasma sputter etch to form a facet profile. The first stage etch is terminated prior to reaching the target depth for the etching process. The second stage etch is a reactive ion etch which directionally follows the facet profile to reach the target depth.
    Type: Grant
    Filed: May 14, 2001
    Date of Patent: July 13, 2004
    Assignee: Micron Technology, Inc.
    Inventors: William A. Polinsky, Thomas S. Kari, Mark A. Bossler
  • Patent number: 6727158
    Abstract: Structure and method for filling an opening in a semiconductor structure that is less susceptible to the formation of voids. A first layer of a first material is formed over the layer in which the opening is to be formed, and a faceted opening is formed in the first layer. The opening in the underlying layer is subsequently formed, and the material that is to fill the opening is deposited over the faceted opening and into the opening of the underlying layer.
    Type: Grant
    Filed: November 8, 2001
    Date of Patent: April 27, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Dirk J. Sundt, William A. Polinsky, Mark A. Bossler, Gabriel G. Videla, Chris L. Inman
  • Publication number: 20040046229
    Abstract: Structure and method for filling an opening in a semiconductor structure that is less susceptible to the formation of voids. A first layer of a first material is formed over the layer in which the opening is to be formed, and a faceted opening is formed in the first layer. The opening in the underlying layer is subsequently formed, and the material that is to fill the opening is deposited over the faceted opening and into the opening of the underlying layer.
    Type: Application
    Filed: July 15, 2003
    Publication date: March 11, 2004
    Inventors: Dirk J. Sundt, William A. Polinsky, Mark A. Bossler, Gabriel G. Videla, Chris L. Inman
  • Publication number: 20030085444
    Abstract: Structure and method for filling an opening in a semiconductor structure that is less susceptible to the formation of voids. A first layer of a first material is formed over the layer in which the opening is to be formed, and a faceted opening is formed in the first layer. The opening in the underlying layer is subsequently formed, and the material that is to fill the opening is deposited over the faceted opening and into the opening of the underlying layer.
    Type: Application
    Filed: November 8, 2001
    Publication date: May 8, 2003
    Inventors: Dirk J. Sundt, William A. Polinsky, Mark A. Bossler, Gabriel G. Videla, Chris L. Inman