Patents by Inventor William Putnam

William Putnam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12287239
    Abstract: Some aspects are directed to an all-on-chip, optoelectronic device for sampling arbitrary, low-energy, near-infrared waveforms under ambient conditions. This solid-state integrated detector uses optical-field-driven electron emission from resonant nanoantennas to achieve petahertz-level switching speeds by generating on-chip attosecond electron burst. Also disclosed is a cross-correlation technique based on perturbation of local electron field emission rates that allows for the full characterization of arbitrary electric fields down to 1 femtojoule, and/or on the order of 500 kV/m, using plasmonic nanoantennas.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: April 29, 2025
    Assignees: Massachusetts Institute of Technology, The Regents of the University of California, Deutsches Elektronen-Synchotron DESY
    Inventors: Marco Turchetti, Mina Bionta, Felix Ritzkowsky, Yujia Yang, Dario Cattozzo Mor, William Putnam, Franz X. Kaertner, Karl K. Berggren, Phillip Donald Keathley
  • Publication number: 20240369407
    Abstract: Some aspects are directed to an all-on-chip, optoelectronic device for sampling arbitrary, low-energy, near-infrared waveforms under ambient conditions. This solid-state integrated detector uses optical-field-driven electron emission from resonant nanoantennas to achieve petahertz-level switching speeds by generating on-chip attosecond electron burst. Also disclosed is a cross-correlation technique based on perturbation of local electron field emission rates that allows for the full characterization of arbitrary electric fields down to 1 femtojoule, and/or on the order of 500 kV/m, using plasmonic nanoantennas.
    Type: Application
    Filed: September 10, 2021
    Publication date: November 7, 2024
    Applicants: Massachusetts Institute of Technology, The Regents of the University of California
    Inventors: Marco Turchetti, Mina Bionta, Felix Ritzkowsky, Yujia YANG, Dario Cattozzo Mor, William Putnam, Franz X. KAERTNER, Karl K. BERGGREN, Phillip Donald KEATHLEY
  • Patent number: 8364454
    Abstract: A system and method for dynamically checking clearance within a geometric mesh model includes a user computer system having a remotely located computer system, and a data storage device. The method periodically updates a digital model of assembled component parts stored on the data storage device, interactively selects a predetermined clearance rule applicable to the digital model and interactively selects a predetermined clearance condition applicable to the selected clearance rule for the digital model that modifies the predetermined clearance rule. The method periodically calculates clearance within the assembled digital model using the selected clearance rule and the selected clearance condition and summarizing the clearance check. The clearance check summary identifies a clearance issue using a predetermined clearance checking criteria and submits the identified clearance issue to an issue manager software program for tracking clearance issues.
    Type: Grant
    Filed: July 27, 2004
    Date of Patent: January 29, 2013
    Assignee: Ford Motor Company
    Inventors: Daniel Arbitter, David Roberts, Sejal Shreffler, Vincent Pesch, William Putnam
  • Publication number: 20060025983
    Abstract: A system and method for dynamically checking clearance within a geometric mesh model is provided. The system includes a user computer system having memory, a processor, a user input device and a display device and a remotely located computer system having a processor and a memory and operatively in communication with the user computer system. The system also includes a data storage means operatively in communication with the remotely located computer system and the user computer system for storing information. The method includes the steps of periodically updating a model representing a digital buck of assembled component parts that is digital buck is stored on the data storage means, interactively selecting a predetermined clearance rule applicable to the digital buck and interactively selecting a predetermined clearance condition applicable to the selected clearance rule for the digital buck that modifies the predetermined clearance rule.
    Type: Application
    Filed: July 27, 2004
    Publication date: February 2, 2006
    Inventors: Daniel Arbitter, David Roberts, Sejal Shreffler, Vincent Pesch, William Putnam
  • Patent number: 6507658
    Abstract: A method and apparatus implements a novel surround sound panning paradigm. Rather than controlling the x-y position of a perceived sound source within a linear grid, the perceived sound is characterized by specifying perceived arrival energy as a function of direction of arrival. In one embodiment, perceived sound source azimuth and width (or spatial extent) are specified, which parameters are used in a novel panning law to control each output channel. In a preferred implementation, the panning control is provided in a Plug-In application for a conventional DAW environment such as Pro Tools, which application includes an interface that provides precise control over the direction and spatial extent of audio.
    Type: Grant
    Filed: January 27, 2000
    Date of Patent: January 14, 2003
    Assignee: Kind of Loud Technologies, LLC
    Inventors: Jonathan S. Abel, William Putnam