Abstract: The method of constructing a high voltage, low power, multi-cell solar array wherein a solar cell base region is formed in a substrate such as but not limited to that of silicon or on a substrate of sapphire, and then by the steps of application of a protective coating on the base, patterned etching of the coating and base to thereby form discrete base regions, forming a semi-conductive junction and upper active region in each base region defined by photolithography, and thus forming discrete cells which are interconnected by metallic electrodes.

Abstract: An improved method of constructing a metal oxide semiconductor (MOS) device having multiple layers of metal deposited by D.C. magnetron sputtering at low D.C. voltages and low substrate temperatures provides multilevel interconnections and cross over between individual circuit elements in integrated circuits without significantly reducing the reliability or seriously affecting the yield.

Abstract: A field effect transistor and method of making the same wherein a semi-conductor layer is placed on an insulating substrate, and wherein the gate region is separated from source and drain regions of a like conductivity type to that of the source and drain regions but of reduced conductivity, the gate electrode and gate region of the layer being of generally reduced length, and the gate region being of greatest length on its surface closest to the gate electrode. This is accomplished by initially creating a relatively large gate region of one polarity, and then reversing the polarity of a central portion of this gate region by ion bombardment, thus achieving a narrower final gate region of the stated configuration.