Patents by Inventor William R. Foland, Jr.
William R. Foland, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8811134Abstract: Methods, software, and apparatuses for reading from and/or writing to an optical storage medium. The methods generally include steps for reading a region of an optical storage medium to produce a readback signal, processing predetermined pattern data to produce one or more measurement instructions, measuring one or more characteristics of the readback signal in response to the measurement instructions to produce one or more measurement results, and further processing the readback signal in accordance with one or more of the measurement results. Thus, the ability to flexibly set test parameters and to quickly and accurately test the write characteristics of a recordable or re-writable optical storage medium is provided.Type: GrantFiled: October 2, 2013Date of Patent: August 19, 2014Assignee: Marvell International Ltd.Inventors: Pantas Sutardja, William R. Foland, Jr.
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Patent number: 8705330Abstract: A method, system and apparatus for fault protection using a linear feedback shift register are presented. The system comprises a protected register containing a first portion for holding a value for a sequence of numbers and a second portion for other parameters. The system also comprises a linear feedback shift register circuit configured to write the sequence of numbers to the first portion of the protected register. If the written sequence of numbers of the protected register matches a reference sequence of numbers, a rewrite circuit is configured to write the second portion of the protected register.Type: GrantFiled: October 14, 2013Date of Patent: April 22, 2014Assignee: Marvell International Ltd.Inventors: William R. Foland, Jr., Eric A. Richards, Christopher L. Painter
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Patent number: 8559287Abstract: A method, system and apparatus for fault protection using a linear feedback shift register are presented. The system comprises a protected register containing a first portion for holding a value for a sequence of numbers and a second portion for other parameters. The system also comprises a linear feedback shift register circuit configured to write the sequence of numbers to the first portion of the protected register. If the written sequence of numbers of the protected register matches a reference sequence of numbers, a rewrite circuit is configured to write the second portion of the protected register.Type: GrantFiled: June 20, 2008Date of Patent: October 15, 2013Assignee: Marvell International Ltd.Inventors: William R. Foland, Jr., Eric A. Richards, Christopher L. Painter
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Patent number: 8559284Abstract: Methods, software, and apparatuses for reading from and/or writing to an optical storage medium. The methods generally include steps for reading a region of an optical storage medium to produce a readback signal, processing predetermined pattern data to produce one or more measurement instructions, measuring one or more characteristics of the readback signal in response to the measurement instructions to produce one or more measurement results, and further processing the readback signal in accordance with one or more of the measurement results. Thus, the ability to flexibly set test parameters and to quickly and accurately test the write characteristics of a recordable or re-writable optical storage medium is provided.Type: GrantFiled: January 13, 2009Date of Patent: October 15, 2013Assignee: Marvell International Ltd.Inventors: Pantas Sutardja, William R. Foland, Jr.
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Patent number: 8498186Abstract: The present disclosure relates to methods, software, and apparatuses for correcting reading and/or writing operations in an optical storage medium. The methods generally include reading a region of an optical storage medium to produce a readback signal, measuring timing offsets for a plurality of the data edges (including one or more non-guide edges), and storing an offset correction for at least one of the plurality of edges based on a measured offset of at least one of the plurality of edges relative to a predetermined offset. The disclosure advantageously enables precise measurement of timing offsets in optical storage media and correction of the measured offsets for timing offsets attributable to edge jitter, timing loop drift, or factors independent of variations in the medium and/or write operation characteristics.Type: GrantFiled: January 13, 2009Date of Patent: July 30, 2013Assignee: Marvell World Trade Ltd.Inventor: William R. Foland, Jr.
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Patent number: 8391115Abstract: Systems, methods and compute program products for compensating for asymmetry variations are described. The asymmetry variations may be monitored both circumferentially and radially across an optical storage medium such that effects of the asymmetry variations may be compensated or minimized. In some implementations, effects of asymmetry variations may be compensated or minimized by first determining light reflected from a circumferential location of an optical storage medium. Then, at least one quality measure based on the detected light is determined. The correlation may be established based on the at least one quality measure and a corresponding circumferential location. A power level of a light source that emits the light is then adjusted based on the correlation.Type: GrantFiled: February 6, 2009Date of Patent: March 5, 2013Assignee: Marvell International Ltd.Inventor: William R. Foland, Jr.
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Patent number: 8345523Abstract: Aspects of the disclosure can provide a method to optimize optical recording. The method can include recording a pre-defined pattern on an optical medium according to a first write strategy, measuring edge timings corresponding to the pre-defined pattern recorded on the optical medium, determining a second write strategy including at least timing modifications to the first write strategy. The timing modifications can be determined based on means and variances of the measured edge timings, edge timing means and variances targets for desired edge timings, and edge timing sensitivities to the timing modifications.Type: GrantFiled: April 5, 2012Date of Patent: January 1, 2013Assignee: Marvell International Ltd.Inventor: William R. Foland, Jr.
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Patent number: 8154968Abstract: Aspects of the disclosure can provide a method to optimize optical recording. The method can include recording a pre-defined pattern on an optical medium according to a first write strategy, measuring edge timings corresponding to the pre-defined pattern recorded on the optical medium, determining a second write strategy including at least timing modifications to the first write strategy. The timing modifications can be determined based on means and variances of the measured edge timings, edge timing means and variances targets for desired edge timings, and edge timing sensitivities to the timing modifications.Type: GrantFiled: January 27, 2009Date of Patent: April 10, 2012Assignee: Marvell International Ltd.Inventor: William R. Foland, Jr.
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Patent number: 8060674Abstract: An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.Type: GrantFiled: May 5, 2009Date of Patent: November 15, 2011Assignee: Broadcom CorporationInventors: Siamack Nemazie, Kaushik Popat, Balaji Virajpet, William R. Foland, Jr., Roger McPherson, Maoxin Wei, Vineet Dujari, Shiang-Jyh Chang
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Patent number: 7839739Abstract: Methods, software, and apparatus for the calibration of writing characteristics for writing to an optical storage medium, and methods of encoding calibration pattern data and calibration instructions are disclosed. The method of calibration generally includes the steps of (a) receiving pattern data and instructions synchronized with the pattern data, (b) writing the pattern data to the optical storage medium in accordance with the instructions, (c) reading a readback signal corresponding to the pattern data from the optical storage medium, (d) processing the readback signal in accordance with the instructions, and (e) determining a value of a writing characteristic for writing data to the optical storage medium based at least in part on the readback signal. The method provides the ability to flexibly set test parameters and to quickly and accurately test the write characteristics of a recordable or re-writable optical storage medium.Type: GrantFiled: December 26, 2006Date of Patent: November 23, 2010Assignee: Marvell World Trade Ltd.Inventors: Pantas Sutardja, William R. Foland, Jr.
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Publication number: 20090274017Abstract: An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.Type: ApplicationFiled: May 5, 2009Publication date: November 5, 2009Inventors: Siamack Nemazie, Kaushik Popat, Balaji Virajpet, William R. Foland, JR., Roger McPherson, Maoxin Wei, Vineet Dujari, Shiang-Jyh Chang
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Publication number: 20090116353Abstract: The present disclosure relates to methods, software, and apparatuses for correcting reading and/or writing operations in an optical storage medium. The methods generally include reading a region of an optical storage medium to produce a readback signal, measuring timing offsets for a plurality of the data edges (including one or more non-guide edges), and storing an offset correction for at least one of the plurality of edges based on a measured offset of at least one of the plurality of edges relative to a predetermined offset. The disclosure advantageously enables precise measurement of timing offsets in optical storage media and correction of the measured offsets for timing offsets attributable to edge jitter, timing loop drift, or factors independent of variations in the medium and/or write operation characteristics.Type: ApplicationFiled: January 13, 2009Publication date: May 7, 2009Inventor: William R. FOLAND, JR.
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Patent number: 7475173Abstract: An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.Type: GrantFiled: March 17, 2006Date of Patent: January 6, 2009Assignee: Broadcom CorporationInventors: Siamack Nemazie, Kaushik Popat, Balaji Virajpet, William R. Foland, Jr., Roger McPherson, Maoxin Wei, Vineet Dujari, Shiang-Jyh Chang
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Patent number: 6594716Abstract: An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.Type: GrantFiled: June 28, 2001Date of Patent: July 15, 2003Assignee: Cirrus Logic, Inc.Inventors: Siamack Nemazie, Kaushik Popat, Balaji Virajpet, William R. Foland, Jr., Roger McPherson, Maoxin Wei, Vineet Dujari, Shiang-Jyh Chang
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Patent number: 6314480Abstract: An integrated HDD system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g. digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. The invention takes advantage of existing circuit design modules provided in the integrated circuit as “hard block” components which are unchanged by integrated circuit design software. Changes in operability of the overall integrated circuit may be readily achieved by altering “soft block” components to customize or tailor the design for a particular hard drive.Type: GrantFiled: November 8, 1999Date of Patent: November 6, 2001Assignee: Cirrus Logic, Inc.Inventors: Siamack Nemazie, Kaushik Popat, Balaji Virajpet, William R. Foland, Jr., Roger McPherson, Maoxin Wei, Vineet Dujari, Shiang-Jyh Chang
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Patent number: 6005731Abstract: A channel quality circuit, incorporated within a sampled amplitude read channel utilized in a magnetic storage system, for processing and accumulating performance data from the individual read channel components, wherein the performance data is used to calibrate the read channel to operate in a particular environment, to estimate the bit error rate of the storage system, and to detect defects in the magnetic medium. The channel quality circuit generates a test pattern of digital data which is written to the storage system. Then, as the test pattern is read from the storage system, the channel quality circuit accumulates performance data from the read channel components. The test pattern is used to generate expected samples and expected sample errors relative to the samples read by the read channel. Gating logic is programmed to accumulate only the particular performance data of interest. The channel quality circuit computes auto and cross-correlations, squared errors, and threshold comparisons.Type: GrantFiled: April 18, 1997Date of Patent: December 21, 1999Assignee: Cirrus Logic, Inc.Inventors: William R. Foland, Jr., Richard T. Behrens, Alan J. Armstrong, Neal Glover
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Patent number: 5987634Abstract: A channel quality circuit, incorporated within a sampled amplitude read channel utilized in a magnetic storage system, for processing and accumulating performance data from the individual read channel components, wherein the performance data is used to calibrate the read channel to operate in a particular environment, to estimate the bit error rate of the storage system, and to detect defects in the magnetic medium. The channel quality circuit generates a test pattern of digital data which is written to the storage system. Then, as the test pattern is read from the storage system, the channel quality circuit accumulates performance data from the read channel components. The test pattern is used to generate expected samples and expected sample errors relative to the samples read by the read channel. Gating logic is programmed to accumulate only the particular performance data of interest. The channel quality circuit computes auto and cross-correlations, squared errors, and threshold comparisons.Type: GrantFiled: July 21, 1997Date of Patent: November 16, 1999Assignee: Cirrus Logic, Inc.Inventors: Richard T. Behrens, William G. Bliss, William R. Foland, Jr.
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Patent number: 5771127Abstract: In a computer disk storage system for recording binary data, a sampled amplitude read channel comprises a sampling device for asynchronously sampling pulses in an analog read signal from a read head positioned over a disk storage medium, interpolated timing recovery for generating synchronous sample values, and a sequence detector for detecting the binary data from the synchronous sample values. The sequence detector comprises a demodulator for detecting a preliminary binary sequence which may contain bit errors, a remodulator for remodulating to estimated sample values, a means for generating sample error values, an error pattern detector for detecting the bit errors, an error detection validator, and an error corrector for correcting the bit errors. The remodulator comprises a partial erasure circuit which compensates for the non-linear reduction in amplitude of a primary pulse caused by secondary pulses located near the primary pulse.Type: GrantFiled: July 29, 1996Date of Patent: June 23, 1998Assignee: Cirrus Logic, Inc.Inventors: David E. Reed, William R. Foland, Jr., William G. Bliss, Richard T. Behrens, Lisa C. Sundell
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Patent number: 5761212Abstract: A measurement circuit is provided to obtain data for monitoring the quality of performance from a digital read channel. Elements of the digital read channel including a sequence detector are incorporated into an integrated circuit together with the measurement circuit. The measurement circuit relates digitized samples of readback data from a magnetic storage device to surrounding samples so that particular samples can be collected in accordance with their surroundings. The circuit includes a programmable time window which can be repeatedly opened for data collection. The circuit is designed to collect various types of data including the bit error rate, sample value, squared sample error, squared gain error, squared timing error, and the occurrences of sample error when it is outside an acceptable programmable threshold. The measurement circuit includes a signal generator for producing a test pattern that is first stored and then read to produce the digitized readback sample values.Type: GrantFiled: October 20, 1995Date of Patent: June 2, 1998Assignee: Cirrus Logic, Inc.Inventors: William R. Foland, Jr., Richard T. Behrens, Alan J. Armstrong, Neal Glover
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Patent number: 5754353Abstract: A channel quality circuit, incorporated within a sampled amplitude read channel utilized in a magnetic storage system, for processing and accumulating performance data from the individual read channel components, wherein the performance data is used to calibrate the read channel to operate in a particular environment, to estimate the bit error rate of the storage system, and to detect defects in the magnetic medium. The channel quality circuit generates a test pattern of digital data which is written to the storage system. Then, as the test pattern is read from the storage system, the channel quality circuit accumulates performance data from the read channel components. The test pattern is used to generate expected samples and expected sample errors relative to the samples read by the read channel. Gating logic is programmed to accumulate only the particular performance data of interest. The channel quality circuit computes auto and cross-correlations, squared errors, and threshold comparisons.Type: GrantFiled: November 17, 1994Date of Patent: May 19, 1998Assignee: Cirrus Logic, Inc.Inventors: Richard T. Behrens, William R. Foland, Jr.