Patents by Inventor William R. Richards, Jr.

William R. Richards, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11646371
    Abstract: A lateral DMOS transistor structure includes a substrate of a first dopant polarity, a body region of the first dopant polarity, a source region, a drift region of a second dopant polarity, a drain region, a channel region, a gate structure over the channel region, a hybrid contact implant, of the second dopant polarity, in the source region, and a respective metal contact on or within each of the source region, gate structure, and drain region. The hybrid contact implant and the metal contact together form a hybrid contact defining first, second, and third electrical junctions. The first junction is a Schottky junction formed vertically between the source metal contact and the body. The second junction is an ohmic junction formed laterally between the source metal contact and the hybrid contact implant. The third junction is a rectifying PN junction between the hybrid contact implant and the channel region.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: May 9, 2023
    Assignees: Amplexia, LLC, X-FAB Global Services GmbH
    Inventors: Brendan Toner, Zhengchao Liu, Gary M Dolny, William R Richards, Jr.
  • Publication number: 20220254914
    Abstract: A lateral DMOS transistor structure includes a substrate of a first dopant polarity, a body region of the first dopant polarity, a source region, a drift region of a second dopant polarity, a drain region, a channel region, a gate structure over the channel region, a hybrid contact implant, of the second dopant polarity, in the source region, and a respective metal contact on or within each of the source region, gate structure, and drain region. The hybrid contact implant and the metal contact together form a hybrid contact defining first, second, and third electrical junctions. The first junction is a Schottky junction formed vertically between the source metal contact and the body. The second junction is an ohmic junction formed laterally between the source metal contact and the hybrid contact implant. The third junction is a rectifying PN junction between the hybrid contact implant and the channel region.
    Type: Application
    Filed: April 26, 2022
    Publication date: August 11, 2022
    Applicants: Amplexia, LLC, X-FAB Global Services GmbH
    Inventors: Brendan TONER, Zhengchao LIU, Gary M DOLNY, William R RICHARDS, JR.
  • Patent number: 11322611
    Abstract: A lateral DMOS transistor structure includes a substrate of a first dopant polarity, a body region of the first dopant polarity, a source region, a drift region of a second dopant polarity, a drain region, a channel region, a gate structure over the channel region, a hybrid contact implant, of the second dopant polarity, in the source region, and a respective metal contact on or within each of the source region, gate structure, and drain region. The hybrid contact implant and the metal contact together form a hybrid contact defining first, second, and third electrical junctions. The first junction is a Schottky junction formed vertically between the source metal contact and the body. The second junction is an ohmic junction formed laterally between the source metal contact and the hybrid contact implant. The third junction is a rectifying PN junction between the hybrid contact implant and the channel region.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: May 3, 2022
    Assignees: Silicet, LLC, X-FAB Global Services GmbH
    Inventors: Brendan Toner, Zhengchao Liu, Gary M Dolny, William R Richards, Jr.
  • Publication number: 20210134999
    Abstract: A lateral DMOS transistor structure includes a substrate of a first dopant polarity, a body region of the first dopant polarity, a source region, a drift region of a second dopant polarity, a drain region, a channel region, a gate structure over the channel region, a hybrid contact implant, of the second dopant polarity, in the source region, and a respective metal contact on or within each of the source region, gate structure, and drain region. The hybrid contact implant and the metal contact together form a hybrid contact defining first, second, and third electrical junctions. The first junction is a Schottky junction formed vertically between the source metal contact and the body. The second junction is an ohmic junction formed laterally between the source metal contact and the hybrid contact implant. The third junction is a rectifying PN junction between the hybrid contact implant and the channel region.
    Type: Application
    Filed: November 12, 2020
    Publication date: May 6, 2021
    Applicants: Silicet, LLC, X-FAB Global Services GmbH
    Inventors: Brendan TONER, Zhengchao LIU, Gary M DOLNY, William R RICHARDS, JR.
  • Patent number: 10892362
    Abstract: A lateral DMOS transistor structure includes a substrate of a first dopant polarity, a body region of the first dopant polarity, a source region, a drift region of a second dopant polarity, a drain region, a channel region, a gate structure over the channel region, a hybrid contact implant, of the second dopant polarity, in the source region, and a respective metal contact on or within each of the source region, gate structure, and drain region. The hybrid contact implant and the metal contact together form a hybrid contact defining first, second, and third electrical junctions. The first junction is a Schottky junction formed vertically between the source metal contact and the body. The second junction is an ohmic junction formed laterally between the source metal contact and the hybrid contact implant. The third junction is a rectifying PN junction between the hybrid contact implant and the channel region.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: January 12, 2021
    Assignees: Silicet, LLC, X-FAB Global Services GmbH
    Inventors: Brendan Toner, Zhengchao Liu, Gary M Dolny, William R Richards, Jr.
  • Patent number: 10511303
    Abstract: The present disclosure presents a circuit, a method, and a system to drive a half-bridge switch using depletion (D) mode compound semiconductor (III-V) switching transistors for a DC-DC converter using at least one driver to drive the switches of the circuit. Also included is at least one charge pump electrically connected to a gate of the transistor, to maintain a voltage that holds the transistor in an off-state. The circuit includes AC coupling capacitors to level shift a voltage and realize fast transistor switching.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: December 17, 2019
    Assignee: Sarda Technologies, Inc.
    Inventors: Bogdan M. Duduman, Anthony G. P. Marini, William R. Richards, Jr., William E. Batchelor, Greg J. Miller, John K. Fogg
  • Patent number: 10510869
    Abstract: Devices, structures, and methods thereof for providing a Schottky or Schottky-like contact as a source region and/or a drain region of a power transistor are disclosed. A power transistor structure comprises a substrate of a first dopant polarity, a drift region formed on or within the substrate, a body region formed on or within the drift region, a gate structure formed on or within the substrate, a source region adjacent to the gate structure, a drain region formed adjacent to the gate structure. At least one of the source region and the drain region is formed from a Schottky or Schottky-like contact substantially near a surface of the substrate, comprising a silicide layer and an interfacial dopant segregation layer. The Schottky or Schottky-like contact is formed by low-temperature annealing a dopant segregation implant in the source and/or drain region.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: December 17, 2019
    Assignee: SILICET, LLC
    Inventors: Gary M. Dolny, William R. Richards, Jr., Randall Milanowski
  • Publication number: 20180212041
    Abstract: Devices, structures, and methods thereof for providing a Schottky or Schottky-like contact as a source region and/or a drain region of a power transistor are disclosed. A power transistor structure comprises a substrate of a first dopant polarity, a drift region formed on or within the substrate, a body region formed on or within the drift region, a gate structure formed on or within the substrate, a source region adjacent to the gate structure, a drain region formed adjacent to the gate structure. At least one of the source region and the drain region is formed from a Schottky or Schottky-like contact substantially near a surface of the substrate, comprising a silicide layer and an interfacial dopant segregation layer. The Schottky or Schottky-like contact is formed by low-temperature annealing a dopant segregation implant in the source and/or drain region.
    Type: Application
    Filed: March 21, 2018
    Publication date: July 26, 2018
    Applicant: Silicet, LLC
    Inventors: Gary M. DOLNY, William R. RICHARDS, JR., Randall MILANOWSKI
  • Patent number: 9947787
    Abstract: Devices, structures, and methods thereof for providing a Schottky or Schottky-like contact as a source region and/or a drain region of a power transistor are disclosed. A power transistor structure comprises a substrate of a first dopant polarity, a drift region formed on or within the substrate, a body region formed on or within the drift region, a gate structure formed on or within the substrate, a source region adjacent to the gate structure, a drain region formed adjacent to the gate structure. At least one of the source region and the drain region is formed from a Schottky or Schottky-like contact substantially near a surface of the substrate, comprising a silicide layer and an interfacial dopant segregation layer. The Schottky or Schottky-like contact is formed by low-temperature annealing a dopant segregation implant in the source and/or drain region.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: April 17, 2018
    Assignee: SILICET, LLC
    Inventors: Gary M. Dolny, William R. Richards, Jr., Randall Milanowski
  • Publication number: 20180041203
    Abstract: The present disclosure presents a circuit, a method, and a system to drive a half-bridge switch using depletion (D) mode compound semiconductor (III-V) switching transistors for a DC-DC converter using at least one driver to drive the switches of the circuit. Also included is at least one charge pump electrically connected to a gate of the transistor, to maintain a voltage that holds the transistor in an off-state. The circuit includes AC coupling capacitors to level shift a voltage and realize fast transistor switching.
    Type: Application
    Filed: September 26, 2017
    Publication date: February 8, 2018
    Inventors: Bogdan M. Duduman, Anthony G.P. Marini, William R. Richards, JR., William E. Batchelor, Greg J. Miller, John K. Fogg
  • Publication number: 20170323970
    Abstract: Devices, structures, and methods thereof for providing a Schottky or Schottky-like contact as a source region and/or a drain region of a power transistor are disclosed. A power transistor structure comprises a substrate of a first dopant polarity, a drift region formed on or within the substrate, a body region formed on or within the drift region, a gate structure formed on or within the substrate, a source region adjacent to the gate structure, a drain region formed adjacent to the gate structure. At least one of the source region and the drain region is formed from a Schottky or Schottky-like contact substantially near a surface of the substrate, comprising a silicide layer and an interfacial dopant segregation layer. The Schottky or Schottky-like contact is formed by low-temperature annealing a dopant segregation implant in the source and/or drain region.
    Type: Application
    Filed: April 28, 2017
    Publication date: November 9, 2017
    Applicant: Silicet, LLC
    Inventors: Gary M. DOLNY, William R. RICHARDS, JR., Randall MILANOWSKI
  • Patent number: 9774322
    Abstract: The present disclosure presents a circuit, a method, and a system to drive a half-bridge switch using depletion (D) mode compound semiconductor (III-V) switching transistors for a DC-DC converter using at least one driver to drive the switches of the circuit. Also included is at least one charge pump electrically connected to a gate of the transistor, to maintain a voltage that holds the transistor in an off-state. The circuit includes AC coupling capacitors to level shift a voltage and realize fast transistor switching.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: September 26, 2017
    Assignee: Sarda Technologies, Inc.
    Inventors: Bogdan M. Duduman, Anthony G. P. Marini, William R. Richards, Jr., William E. Batchelor, Greg J. Miller, John K. Fogg
  • Publication number: 20090134476
    Abstract: An accumulation mode field effect transistor includes a substrate, an insulated gate on the substrate, source and drain regions on the substrate on opposite sides of the insulated gate, a channel region that is doped a first conductivity type at a first doping concentration, and that extends into the substrate beneath the insulated gate to a channel region depth, and a counter-doped region (for example, a portion of the substrate, a tub in the substrate or a well in the substrate) beneath the channel region that is doped a second conductivity type at a second doping concentration to define a semiconductor junction therebetween at the channel region depth.
    Type: Application
    Filed: November 11, 2008
    Publication date: May 28, 2009
    Inventor: William R. Richards, JR.
  • Publication number: 20020036328
    Abstract: An offset drain Fermi-threshold field effect transistor (Fermi-FET) includes spaced apart source and drain regions in an integrated circuit substrate, and a Fermi-FET channel in the integrated circuit substrate, between the spaced apart source and drain regions. A gate insulating layer is on the integrated circuit substrate between the spaced apart source and drain regions, and a gate electrode is on the gate insulating layer. The gate electrode is closer to the source region than to the drain region. Stated differently, the drain region is spaced farther away from the gate electrode than the source region. The offset drain Fermi-FET can introduce a drift region between the drain region and the Fermi-FET channel that can provide the high voltage and/or high frequency Fermi-FETs, while retaining the Fermi-FET advantages in the channel.
    Type: Application
    Filed: November 16, 1998
    Publication date: March 28, 2002
    Inventors: WILLIAM R. RICHARDS, JR., MICHAEL W. DENNEN
  • Patent number: 5786620
    Abstract: A Fermi-FET, including but not limited to a tub-FET, a contoured-tub Fermi-FET or a short channel Fermi-FET includes a drain extension region of the same conductivity type as the drain region and a drain pocket implant region of opposite conductivity type from the drain region. The drain pocket implant region acts as a drain field stop to reduce or prevent drain-to-source field reach-through. Reduced low drain field threshold voltage, significantly reduced drain induced barrier lowering and reduced threshold dependence on channel length may be obtained, resulting in higher performance in short channels.
    Type: Grant
    Filed: March 8, 1996
    Date of Patent: July 28, 1998
    Assignee: Thunderbird Technologies, Inc.
    Inventors: William R. Richards, Jr., Michael W. Dennen
  • Patent number: 4956306
    Abstract: A semiconductor material is overlayed with sequentially stacked layers including a protective layer, an affinity layer having an affinity for a second implant blocking material comprising tungsten, a first implant blocking layer and a masking layer having a first pattern. A portion of the first blocking layer not being masked is removed to expose a first portion of the affinity layer and a first dopant is implanted into the underlying semiconductor through the exposed first portion of the affinity layer. The mask is removed to expose the first blocking layer and a second blocking layer is formed from the second blocking material over the exposed first portion of the affinity layer but not over the exposed first blocking layer. The first blocking layer is removed to expose a second portion of the affinity layer which constitutes a second pattern. A second dopant is implanted into the underlying semiconductor through the exposed second portion of the affinity layer.
    Type: Grant
    Filed: November 3, 1988
    Date of Patent: September 11, 1990
    Assignee: Harris Corporation
    Inventors: Robert T. Fuller, Joseph C. Tsang, William R. Richards, Jr.
  • Patent number: 4076642
    Abstract: A new class of monoepoxyethylenecyclohexyl compounds useful as acid scavengers and corrosion inhibitors in functional fluid compositions.
    Type: Grant
    Filed: May 11, 1976
    Date of Patent: February 28, 1978
    Assignee: Monsanto Company
    Inventors: John F. Herber, William R. Richard, Jr., Robert W. Street
  • Patent number: 3976585
    Abstract: Functional fluid compositions comprising a major amount of a base stock material which is an ester or amide of an acid phosphorus, a di- or tricarboxylic acid ester, an ester of a polyhydric compound or mixtures thereof, optionally minor amounts of other base stock materials or base stock modifiers such as viscosity index improvers, cavitation damage inhibitors, and lubricity agents, and an additive amount of an acid scavenger and corrosion inhibitor which is a monoepoxy substituted cyclohexane such as C.sub.1-4 alkyl-3,4-epoxycyclohexane. The compositions are particularly useful as aircraft hydraulic fluids.
    Type: Grant
    Filed: March 25, 1974
    Date of Patent: August 24, 1976
    Assignee: Monsanto Company
    Inventors: John F. Herber, Robert W. Street, William R. Richard, Jr.
  • Patent number: 3969254
    Abstract: A new class of monoepoxyendooxycyclohexyl compounds useful as acid scavengers and corrosion inhibitors in functional fluid compositions.
    Type: Grant
    Filed: September 23, 1975
    Date of Patent: July 13, 1976
    Assignee: Monsanto Company
    Inventors: John F. Herber, Robert W. Street, William R. Richard, Jr.
  • Patent number: 3941709
    Abstract: Functional fluid compositions comprising a major amount of a base stock material which is an ester or amide of an acid phosphorus, a di- or tricarboxylic acid ester, an ester of a polyhydric compound or mixtures thereof, optionally minor amounts of other base stock materials or base stock modifiers such as viscosity index improvers, cavitation damage inhibitors, and lubricity agents, and an additive amount of an acid scavenger and corrosion inhibitor which is a monoepoxy norbornyl carboxylate such as C.sub.1.sub.-4 alkyl-5,6-epoxynorbornane carboxylate. The compositions are particularly useful as aircraft hydraulic fluids.
    Type: Grant
    Filed: March 25, 1974
    Date of Patent: March 2, 1976
    Assignee: Monsanto Company
    Inventors: John F. Herber, William R. Richard, Jr., Robert W. Street