Patents by Inventor William R. Smith
William R. Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12230592Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: GrantFiled: February 23, 2024Date of Patent: February 18, 2025Assignee: pSemi CorporationInventors: William R. Smith, Jr., Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Publication number: 20240274551Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: ApplicationFiled: February 23, 2024Publication date: August 15, 2024Inventors: William R. Smith, JR., Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Patent number: 12038951Abstract: A map control module receives a stream of map data characterizing a geographic region proximal to a vehicle and outputs a moving map, and the moving map is divisible into a matrix of cells. A map item control receives a stream of point of interest (POI) data characterizing a plurality of POIs within the boundary and categorizes each of the plurality of POIs to define a set of categories. The map item control determines a display location of a map item within the matrix of cells for each of the plurality of POIs and determines an importance for each POI within a same category. The map item control forms a set of clusters of map items. Each map item in a given cluster of map items has a same cell and a same category. The map item control selects a top-item for each cluster of map items.Type: GrantFiled: July 6, 2022Date of Patent: July 16, 2024Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: Douglas M. Dyer, Verner Keith Devlin, William R. Smith
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Publication number: 20240095263Abstract: A map control module receives a stream of map data characterizing a geographic region proximal to a vehicle and outputs a moving map, and the moving map is divisible into a matrix of cells. A map item control receives a stream of point of interest (POI) data characterizing a plurality of POIs within the boundary and categorizes each of the plurality of POIs to define a set of categories. The map item control determines a display location of a map item within the matrix of cells for each of the plurality of POIs and determines an importance for each POI within a same category. The map item control forms a set of clusters of map items. Each map item in a given cluster of map items has a same cell and a same category. The map item control selects a top-item for each cluster of map items.Type: ApplicationFiled: July 6, 2022Publication date: March 21, 2024Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: DOUGLAS M. DYER, VERNER KEITH DEVLIN, WILLIAM R. SMITH
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Patent number: 11923322Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: GrantFiled: December 7, 2021Date of Patent: March 5, 2024Assignee: pSemi CorporationInventors: William R. Smith, Jr., Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Publication number: 20220173058Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: ApplicationFiled: December 7, 2021Publication date: June 2, 2022Inventors: William R. Smith, JR., Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Patent number: 11211344Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: GrantFiled: October 8, 2019Date of Patent: December 28, 2021Assignee: pSemi CorporationInventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Patent number: 10809918Abstract: Options for handling write operations may be selected based on a determined probability that a read operation for a portion of data will occur while the data portion is still in an I/O cache as a result of a write operation. As used herein, a “read-after-write event (“RAW”) is an occurrence of a read operation for a portion of data while the data portion is still in an I/O cache as a result of a write operation. The probability of a RAW may be determined by applying Bayesian inference, and may include applying exponential smoothing to calculations made on historical I/O information so that more recent I/O events have greater weight in determining RAW probability. Based on the determined RAW probability, write data may either be journaled in a write journal or written to a cache slot and de-staged to a physical storage device as part of write-in-place processing.Type: GrantFiled: January 31, 2019Date of Patent: October 20, 2020Assignee: EMC IP Holding Company LLCInventors: Owen Martin, Mark J. Halstead, William R. Smith-Vaniz
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Publication number: 20200249838Abstract: Options for handling write operations may be selected based on a determined probability that a read operation for a portion of data will occur while the data portion is still in an I/O cache as a result of a write operation. As used herein, a “read-after-write event (”RAW?) is an occurrence of a read operation for a portion of data while the data portion is still in an I/O cache as a result of a write operation. The probability of a RAW may be determined by applying Bayesian inference, and may include applying exponential smoothing to calculations made on historical I/O information so that more recent I/O events have greater weight in determining RAW probability. Based on the determined RAW probability, write data may either be journaled in a write journal or written to a cache slot and de-staged to a physical storage device as part of write-in-place processing.Type: ApplicationFiled: January 31, 2019Publication date: August 6, 2020Applicant: EMC IP Holding Company LLCInventors: Owen Martin, Mark J. Halstead, William R. Smith-Vaniz
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Publication number: 20200111756Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: ApplicationFiled: October 8, 2019Publication date: April 9, 2020Inventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Patent number: 10468360Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: GrantFiled: May 23, 2017Date of Patent: November 5, 2019Assignee: pSemi CorporationInventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Publication number: 20180005966Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: ApplicationFiled: May 23, 2017Publication date: January 4, 2018Inventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Patent number: 9673155Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: GrantFiled: February 14, 2014Date of Patent: June 6, 2017Assignee: Peregrine Semiconductor CorporationInventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Patent number: 9438196Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: GrantFiled: August 18, 2014Date of Patent: September 6, 2016Assignee: Peregrine Semiconductor CorporationInventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Publication number: 20150235971Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: ApplicationFiled: February 14, 2014Publication date: August 20, 2015Applicant: PEREGRINE SEMICONDUCTOR CORPORATIONInventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Publication number: 20150236671Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: ApplicationFiled: August 18, 2014Publication date: August 20, 2015Inventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Publication number: 20140221891Abstract: A knee brace for easing the symptoms of osteoarthritis is disclosed in which force straps provide a varying unloading force to the knee as the joint is flexed and straightened. The force straps are arranged to alter the degree of angulation between frames of the brace that span the joint, such that abstracting force is applied above and below the joint rather than to the joint itself. A dual hinge brace incorporating a push-pull hinge that alters the degree of angulation between the frames of a knee brace is also described.Type: ApplicationFiled: February 3, 2014Publication date: August 7, 2014Applicant: Matrix Bracing, Inc.Inventors: Murali Sreeramagiri, Samuel Jackson Rhodes, William R. Smith
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Patent number: 8326870Abstract: A critical parameter/requirements management process model for managing a development program for a product and an associated product structure-driven critical parameter/requirements management tool and environment is provided. In one embodiment, the process includes a product structure classification scheme, a parameter/requirements classification scheme, a parameter/requirements process and maturity model, and in-process and requirements conformance views. In one embodiment, the tool includes a user interface layer, a business layer, a data layer, and a database. The user interface layer may include a product structure feature group, an add/edit/link feature group, a manage maturity feature group, and a manage conformance feature group. The tool may be implemented as a web server accessible to user workstations operating as thin clients.Type: GrantFiled: January 18, 2011Date of Patent: December 4, 2012Assignee: Xerox CorporationInventors: Charles D. Rizzolo, Ronald E. Stokes, Louis F. LaVallee, Charles M. Gardiner, William R. Smith, Kathy Cupo, Richard S. Pagano, Joel S. Cornell, Barry P. Mandel, Ralph E. Simpson, John T. Potter
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Patent number: 8145671Abstract: A critical parameter/requirements management process model for managing a development program for a product and an associated product structure-driven critical parameter/requirements management tool and environment is provided. In one embodiment, the process includes a product structure classification scheme, a parameter/requirements classification scheme, a parameter/requirements process and maturity model, and in-process and requirements conformance views. In one embodiment, the tool includes a user interface layer, a business layer, a data layer, and a database. The user interface layer may include a product structure feature group, an add/edit/link feature group, a manage maturity feature group, and a manage conformance feature group. The tool may be implemented as a web server accessible to user workstations operating as thin clients.Type: GrantFiled: January 18, 2011Date of Patent: March 27, 2012Assignee: Xerox CorporationInventors: Charles D. Rizzolo, Ronald E. Stokes, Louis F. LaVallee, Charles M. Gardiner, William R. Smith, Kathy Cupo, Richard S. Pagano, Joel S. Cornell, Barry P. Mandel, Ralph E. Simpson, John T. Potter
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Publication number: 20110112887Abstract: A critical parameter/requirements management process model for managing a development program for a product and an associated product structure-driven critical parameter/requirements management tool and environment is provided. In one embodiment, the process includes a product structure classification scheme, a parameter/requirements classification scheme, a parameter/requirements process and maturity model, and in-process and requirements conformance views. In one embodiment, the tool includes a user interface layer, a business layer, a data layer, and a database. The user interface layer may include a product structure feature group, an add/edit/link feature group, a manage maturity feature group, and a manage conformance feature group. The tool may be implemented as a web server accessible to user workstations operating as thin clients.Type: ApplicationFiled: January 18, 2011Publication date: May 12, 2011Applicant: XEROX CORPORATIONInventors: Charles D. Rizzolo, Ronald E. Stokes, Louis F. LaVallee, Charles M. Gardiner, William R. Smith, Kathy Cupo, Richard S. Pagano, Joel S. Cornell, Barry P. Mandel, Ralph E. Simpson, John T. Potter