Patents by Inventor William R. Smith

William R. Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11972086
    Abstract: A system for automatically increasing a capacity of a virtual space in a virtual world may include a processor and a module operating on the processor for detecting an attempt by an avatar to enter a virtual space in a virtual world. The system may also include another module for determining if an allowable number of avatars is currently in the virtual space. The allowable number of avatars may be determined by at least a capacity of a server that is hosting the virtual space. Another module may be provided for increasing a capacity of the virtual space when the allowable number of avatars is currently in the virtual space. Increasing the capacity of the virtual space may include spawning a replicate new virtual space on a different server in response to the capacity of the server that is hosting the virtual space reaching the allowable number of avatars.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: April 30, 2024
    Assignee: Activision Publishing, Inc.
    Inventors: Peter F. Haggar, Brian R. Bokor, Daniel E. House, William B. Nicol, II, Andrew B. Smith, Luis J. Ostdiek
  • Patent number: 11970128
    Abstract: A sealed modular trim supplemental side air bag inflatable curtain (SABIC) module assembly includes a SABIC and a vehicle trim assembly encapsulating the SABIC. The SABIC is sealed within the vehicle trim assembly and provided as a complete compact module configured for subsequent attachment to a vehicle roll bar.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: April 30, 2024
    Assignee: FCA US LLC
    Inventors: William Mar, Alan R Kirby, Grant T Smith, Michael J Jarvis, Mark A Steinbach, Jerry Domulewicz
  • Publication number: 20240122080
    Abstract: A superconductor device includes a high superconductivity transition temperature enhanced from the raw material transition temperature. The superconductor device includes a matrix material and a core material. The enhancing matrix material and the core material together create a system of strongly coupled carriers. A plurality of low-dimensional conductive features can be embedded in the matrix. The low-dimensional conductive features (e.g., nanowires or nanoparticles) can be conductors or superconductors. An interaction between electrons of the low-dimensional conductive features and the enhancing matrix material can promote excitations that increase a superconductivity transition temperature of the superconductor device.
    Type: Application
    Filed: October 9, 2023
    Publication date: April 11, 2024
    Inventors: Philipp Braeuninger-Weimer, Nathan P. Myhrvold, Conor L. Myhrvold, Cameron Myhrvold, Clarence T. Tegreene, Roderick A. Hyde, Lowell L. Wood, JR., Muriel Y. Ishikawa, Victoria Y.H. Wood, David R. Smith, John Brian Pendry, Charles Whitmer, William Henry Mangione-Smith, Brian C. Holloway, Stuart A. Wolf, Vladimir Z. Kresin
  • Publication number: 20240095263
    Abstract: A map control module receives a stream of map data characterizing a geographic region proximal to a vehicle and outputs a moving map, and the moving map is divisible into a matrix of cells. A map item control receives a stream of point of interest (POI) data characterizing a plurality of POIs within the boundary and categorizes each of the plurality of POIs to define a set of categories. The map item control determines a display location of a map item within the matrix of cells for each of the plurality of POIs and determines an importance for each POI within a same category. The map item control forms a set of clusters of map items. Each map item in a given cluster of map items has a same cell and a same category. The map item control selects a top-item for each cluster of map items.
    Type: Application
    Filed: July 6, 2022
    Publication date: March 21, 2024
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: DOUGLAS M. DYER, VERNER KEITH DEVLIN, WILLIAM R. SMITH
  • Publication number: 20240076875
    Abstract: A shingle coating asphalt composition is provided that is produced from a paving grade asphalt. The asphalt composition comprises a paving-grade asphalt that has been modified with one or more polymer additives; and a secondary additive comprising one or more of a viscosity reducing agent, a wax, a salt of a fatty acid ester, and an amide of a fatty acid. The shingle coating asphalt coating composition is used to make a shingle. The shingle includes a substrate, the asphalt, and roofing granules.
    Type: Application
    Filed: November 8, 2023
    Publication date: March 7, 2024
    Inventors: Carmen Anthony LaTorre, Jacob Paul Honsvick, Christopher Patrick Kasprzak, Daniel James Buckwalter, Edward R. Harrington, Jonathan Ross Davis, Laurand Henry Lewandowski, David Michael Ploense, William Edwin Smith, Scott W. Schweiger, Ganesh Latta
  • Patent number: 11923322
    Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: March 5, 2024
    Assignee: pSemi Corporation
    Inventors: William R. Smith, Jr., Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
  • Publication number: 20220173058
    Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.
    Type: Application
    Filed: December 7, 2021
    Publication date: June 2, 2022
    Inventors: William R. Smith, JR., Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
  • Patent number: 11211344
    Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: December 28, 2021
    Assignee: pSemi Corporation
    Inventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
  • Patent number: 10809918
    Abstract: Options for handling write operations may be selected based on a determined probability that a read operation for a portion of data will occur while the data portion is still in an I/O cache as a result of a write operation. As used herein, a “read-after-write event (“RAW”) is an occurrence of a read operation for a portion of data while the data portion is still in an I/O cache as a result of a write operation. The probability of a RAW may be determined by applying Bayesian inference, and may include applying exponential smoothing to calculations made on historical I/O information so that more recent I/O events have greater weight in determining RAW probability. Based on the determined RAW probability, write data may either be journaled in a write journal or written to a cache slot and de-staged to a physical storage device as part of write-in-place processing.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: October 20, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Owen Martin, Mark J. Halstead, William R. Smith-Vaniz
  • Publication number: 20200249838
    Abstract: Options for handling write operations may be selected based on a determined probability that a read operation for a portion of data will occur while the data portion is still in an I/O cache as a result of a write operation. As used herein, a “read-after-write event (”RAW?) is an occurrence of a read operation for a portion of data while the data portion is still in an I/O cache as a result of a write operation. The probability of a RAW may be determined by applying Bayesian inference, and may include applying exponential smoothing to calculations made on historical I/O information so that more recent I/O events have greater weight in determining RAW probability. Based on the determined RAW probability, write data may either be journaled in a write journal or written to a cache slot and de-staged to a physical storage device as part of write-in-place processing.
    Type: Application
    Filed: January 31, 2019
    Publication date: August 6, 2020
    Applicant: EMC IP Holding Company LLC
    Inventors: Owen Martin, Mark J. Halstead, William R. Smith-Vaniz
  • Publication number: 20200111756
    Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.
    Type: Application
    Filed: October 8, 2019
    Publication date: April 9, 2020
    Inventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
  • Patent number: 10468360
    Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: November 5, 2019
    Assignee: pSemi Corporation
    Inventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
  • Publication number: 20180005966
    Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.
    Type: Application
    Filed: May 23, 2017
    Publication date: January 4, 2018
    Inventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
  • Patent number: 9673155
    Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: June 6, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
  • Patent number: 9438196
    Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: September 6, 2016
    Assignee: Peregrine Semiconductor Corporation
    Inventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
  • Publication number: 20150235971
    Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.
    Type: Application
    Filed: February 14, 2014
    Publication date: August 20, 2015
    Applicant: PEREGRINE SEMICONDUCTOR CORPORATION
    Inventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
  • Publication number: 20150236671
    Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.
    Type: Application
    Filed: August 18, 2014
    Publication date: August 20, 2015
    Inventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
  • Publication number: 20140221891
    Abstract: A knee brace for easing the symptoms of osteoarthritis is disclosed in which force straps provide a varying unloading force to the knee as the joint is flexed and straightened. The force straps are arranged to alter the degree of angulation between frames of the brace that span the joint, such that abstracting force is applied above and below the joint rather than to the joint itself. A dual hinge brace incorporating a push-pull hinge that alters the degree of angulation between the frames of a knee brace is also described.
    Type: Application
    Filed: February 3, 2014
    Publication date: August 7, 2014
    Applicant: Matrix Bracing, Inc.
    Inventors: Murali Sreeramagiri, Samuel Jackson Rhodes, William R. Smith
  • Patent number: 8326870
    Abstract: A critical parameter/requirements management process model for managing a development program for a product and an associated product structure-driven critical parameter/requirements management tool and environment is provided. In one embodiment, the process includes a product structure classification scheme, a parameter/requirements classification scheme, a parameter/requirements process and maturity model, and in-process and requirements conformance views. In one embodiment, the tool includes a user interface layer, a business layer, a data layer, and a database. The user interface layer may include a product structure feature group, an add/edit/link feature group, a manage maturity feature group, and a manage conformance feature group. The tool may be implemented as a web server accessible to user workstations operating as thin clients.
    Type: Grant
    Filed: January 18, 2011
    Date of Patent: December 4, 2012
    Assignee: Xerox Corporation
    Inventors: Charles D. Rizzolo, Ronald E. Stokes, Louis F. LaVallee, Charles M. Gardiner, William R. Smith, Kathy Cupo, Richard S. Pagano, Joel S. Cornell, Barry P. Mandel, Ralph E. Simpson, John T. Potter
  • Patent number: 8145671
    Abstract: A critical parameter/requirements management process model for managing a development program for a product and an associated product structure-driven critical parameter/requirements management tool and environment is provided. In one embodiment, the process includes a product structure classification scheme, a parameter/requirements classification scheme, a parameter/requirements process and maturity model, and in-process and requirements conformance views. In one embodiment, the tool includes a user interface layer, a business layer, a data layer, and a database. The user interface layer may include a product structure feature group, an add/edit/link feature group, a manage maturity feature group, and a manage conformance feature group. The tool may be implemented as a web server accessible to user workstations operating as thin clients.
    Type: Grant
    Filed: January 18, 2011
    Date of Patent: March 27, 2012
    Assignee: Xerox Corporation
    Inventors: Charles D. Rizzolo, Ronald E. Stokes, Louis F. LaVallee, Charles M. Gardiner, William R. Smith, Kathy Cupo, Richard S. Pagano, Joel S. Cornell, Barry P. Mandel, Ralph E. Simpson, John T. Potter