Abstract: A superconductor device includes a high superconductivity transition temperature enhanced from the raw material transition temperature. The superconductor device includes a matrix material and a core material. The enhancing matrix material and the core material together create a system of strongly coupled carriers. A plurality of low-dimensional conductive features can be embedded in the matrix. The low-dimensional conductive features (e.g., nanowires or nanoparticles) can be conductors or superconductors. An interaction between electrons of the low-dimensional conductive features and the enhancing matrix material can promote excitations that increase a superconductivity transition temperature of the superconductor device.

Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.

Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.

Abstract: A method of computing parasitic capacitances between multiple electrical conductors within an electric circuit computes a division of the circuit's physical layout into a plurality of windows. The parasitic capacitances associated with the conductors of each window are computed, and the results for the various windows combined into a matrix of parasitic capacitances for the overall circuit. The windows are preferably overlapped, with the capacitance values for conductor pairs located in more than one window averaged. Complex polygons are fractured into simpler shapes by extending a ray from a vertex of the polygon to intersect an opposed segment, and defining the peripheries of the simpler elements as comprising the ray and respective different portions of the original polygon's periphery. Rays may be extended in a x,y pattern from multiple vertices of the polygon until a ray is located that extends through the polygon's interior, with the fracturing performed along that ray.