Patents by Inventor William Rericha
William Rericha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20070190463Abstract: Alignment tolerances between narrow mask lines, for forming interconnects in the array region of an integrated circuit, and wider mask lines, for forming interconnects in the periphery of the integrated circuit, are increased. The narrow mask lines are formed by pitch multiplication and the wider mask lines are formed by photolithography. The wider mask lines and are aligned so that one side of those lines is flush with or inset from a corresponding side of the narrow lines. Being wider, the opposite sides of the wider mask lines protrude beyond the corresponding opposite sides of the narrow mask lines. The wider mask lines are formed in negative photoresist having a height less than the height of the narrow mask lines. Advantageously, the narrow mask lines can prevent expansion of the mask lines in one direction, thus increasing alignment tolerances in that direction.Type: ApplicationFiled: March 26, 2007Publication date: August 16, 2007Applicant: Micron Technology, Inc.Inventors: Gurtej Sandhu, Randal Chance, William Rericha
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Publication number: 20070161251Abstract: Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC.Type: ApplicationFiled: March 1, 2007Publication date: July 12, 2007Applicant: Micron Technology, Inc.Inventors: Luan Tran, William Rericha, John Lee, Ramakanth Alapati, Sheron Honarkhah, Shuang Meng, Puneet Sharma, Jingyi Bai, Zhiping Yin, Paul Morgan, Mirzafer Abatchev, Gurtej Sandhu, D. Durcan
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Publication number: 20070148984Abstract: Different sized features in the array and in the periphery of an integrated circuit are patterned on a substrate in a single step. In particular, a mixed pattern, combining two separately formed patterns, is formed on a single mask layer and then transferred to the underlying substrate. The first of the separately formed patterns is formed by pitch multiplication and the second of the separately formed patterns is formed by conventional photolithography. The first of the separately formed patterns includes lines that are below the resolution of the photolithographic process used to form the second of the separately formed patterns. These lines are made by forming a pattern on photoresist and then etching that pattern into an amorphous carbon layer. Sidewall pacers having widths less than the widths of the un-etched parts of the amorphous carbon are formed on the sidewalls of the amorphous carbon. The amorphous carbon is then removed, leaving behind the sidewall spacers as a mask pattern.Type: ApplicationFiled: March 8, 2007Publication date: June 28, 2007Applicant: Micron Technology, Inc.Inventors: Mirzafer Abatchev, Gurtej Sandhu, Luan Tran, William Rericha, D. Durcan
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Publication number: 20070138526Abstract: Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC.Type: ApplicationFiled: January 31, 2007Publication date: June 21, 2007Applicant: Micron Technology, Inc.Inventors: Luan Tran, William Rericha, John Lee, Ramakanth Alapati, Sheron Honarkhah, Shuang Meng, Puneet Sharma, Jingyi Bai, Zhiping Yin, Paul Morgan, Mirzafer Abatchev, Gurtej Sandhu, D. Durcan
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Publication number: 20070128856Abstract: Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC.Type: ApplicationFiled: February 1, 2007Publication date: June 7, 2007Applicant: Micron Technology, Inc.Inventors: Luan Tran, William Rericha, John Lee, Ramakanth Alapati, Sheron Honarkhah, Shuang Meng, Puneet Sharma, Jingyi (Jenny) Bai, Zhiping Yin, Paul Morgan, Mirzafer Abatchev, Gurtej Sandhu, D. Durcan
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Publication number: 20060286490Abstract: A method of forming a template for use in imprint lithography. The method comprises providing an ultraviolet (“UV”) wavelength radiation transparent layer and forming a pattern in the UV transparent layer by photolithography. The pattern may be formed by anisotropically etching the UV transparent layer and may have feature dimensions of less than approximately 100 nm, such as dimensions of less than approximately 45 nm. An additional embodiment of the method comprises providing a UV opaque layer comprising a first pattern therein, forming a first UV transparent layer in contact with the first contact-pattern of the UV opaque layer, forming a second UV transparent layer in contact with the first UV transparent layer, and removing the UV opaque layer to form the template. An intermediate template structure for use in imprint lithography is also disclosed. In other embodiments, a template that is opaque to UV wavelength radiation and a method of forming the same are disclosed.Type: ApplicationFiled: June 17, 2005Publication date: December 21, 2006Inventors: Gurtej Sandhu, William Rericha
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Publication number: 20060262511Abstract: Different sized features in the array and in the periphery of an integrated circuit are patterned on a substrate in a single step. In particular, a mixed pattern, combining two separately formed patterns, is formed on a single mask layer and then transferred to the underlying substrate. The first of the separately formed patterns is formed by pitch multiplication and the second of the separately formed patterns is formed by conventional photolithography. The first of the separately formed patterns includes lines that are below the resolution of the photolithographic process used to form the second of the separately formed patterns. These lines are made by forming a pattern on photoresist and then etching that pattern into an amorphous carbon layer. Sidewall pacers having widths less than the widths of the un-etched parts of the amorphous carbon are formed on the sidewalls of the amorphous carbon. The amorphous carbon is then removed, leaving behind the sidewall spacers as a mask pattern.Type: ApplicationFiled: July 24, 2006Publication date: November 23, 2006Inventors: Mirzafer Abatchev, Gurtej Sandhu, Luan Tran, William Rericha, D. Durcan
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Publication number: 20060258162Abstract: Different sized features in the array and in the periphery of an integrated circuit are patterned on a substrate in a single step. In particular, a mixed pattern, combining two separately formed patterns, is formed on a single mask layer and then transferred to the underlying substrate. The first of the separately formed patterns is formed by pitch multiplication and the second of the separately formed patterns is formed by conventional photolithography. The first of the separately formed patterns includes lines that are below the resolution of the photolithographic process used to form the second of the separately formed patterns. These lines are made by forming a pattern on photoresist and then etching that pattern into an amorphous carbon layer. Sidewall pacers having widths less than the widths of the un-etched parts of the amorphous carbon are formed on the sidewalls of the amorphous carbon. The amorphous carbon is then removed, leaving behind the sidewall spacers as a mask pattern.Type: ApplicationFiled: July 24, 2006Publication date: November 16, 2006Inventors: Mirzafer Abatchev, Gurtej Sandhu, Luan Tran, William Rericha, D. Durcan
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Publication number: 20060240362Abstract: Alignment tolerances between narrow mask lines, for forming interconnects in the array region of an integrated circuit, and wider mask lines, for forming interconnects in the periphery of the integrated circuit, are increased. The narrow mask lines are formed by pitch multiplication and the wider mask lines are formed by photolithography. The wider mask lines and are aligned so that one side of those lines is flush with or inset from a corresponding side of the narrow lines. Being wider, the opposite sides of the wider mask lines protrude beyond the corresponding opposite sides of the narrow mask lines. The wider mask lines are formed in negative photoresist having a height less than the height of the narrow mask lines. Advantageously, the narrow mask lines can prevent expansion of the mask lines in one direction, thus increasing alignment tolerances in that direction.Type: ApplicationFiled: June 20, 2006Publication date: October 26, 2006Inventors: Gurtej Sandhu, Randal Chance, William Rericha
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Publication number: 20060211260Abstract: Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC.Type: ApplicationFiled: August 29, 2005Publication date: September 21, 2006Inventors: Luan Tran, William Rericha, John Lee, Ramakanth Alapati, Sheron Honarkhah, Shuang Meng, Puneet Sharma, Jingyi (Jenny) Bai, Zhiping Yin, Paul Morgan, Mirzafer Abatchev, Gurtej Sandhu, D. Durcan
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Publication number: 20060158631Abstract: A method and apparatus for exposing a radiation-sensitive material of a microlithographic substrate to a selected radiation. The method can include directing the radiation along a radiation path in a first direction toward a reticle, passing the radiation from the reticle and to the microlithographic substrate along the radiation path in a second direction, and moving the reticle relative to the radiation path along a reticle path generally normal to the first direction. The microlithographic substrate can move relative to the radiation path along a substrate path having a first component generally parallel to the second direction, and a second component generally perpendicular to the second direction. The microlithographic substrate can move generally parallel to and generally perpendicular to the second direction in a periodic manner while the reticle moves along the reticle path to change a relative position of a focal plane of the radiation.Type: ApplicationFiled: March 17, 2006Publication date: July 20, 2006Applicant: Micron Technology, Inc.Inventors: Ulrich Boettiger, Scott Light, William Rericha, Craig Hickman
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Publication number: 20060046201Abstract: Alignment tolerances between narrow mask lines, for forming interconnects in the array region of an integrated circuit, and wider mask lines, for forming interconnects in the periphery of the integrated circuit, are increased. The narrow mask lines are formed by pitch multiplication and the wider mask lines are formed by photolithography. The wider mask lines and are aligned so that one side of those lines is flush with or inset from a corresponding side of the narrow lines. Being wider, the opposite sides of the wider mask lines protrude beyond the corresponding opposite sides of the narrow mask lines. The wider mask lines are formed in negative photoresist having a height less than the height of the narrow mask lines. Advantageously, the narrow mask lines can prevent expansion of the mask lines in one direction, thus increasing alignment tolerances in that direction.Type: ApplicationFiled: September 2, 2004Publication date: March 2, 2006Inventors: Gurtej Sandhu, Randal Chance, William Rericha
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Publication number: 20060046484Abstract: Different sized features in the array and in the periphery of an integrated circuit are patterned on a substrate in a single step. In particular, a mixed pattern, combining two separately formed patterns, is formed on a single mask layer and then transferred to the underlying substrate. The first of the separately formed patterns is formed by pitch multiplication and the second of the separately formed patterns is formed by conventional photolithography. The first of the separately formed patterns includes lines that are below the resolution of the photolithographic process used to form the second of the separately formed patterns. These lines are made by forming a pattern on photoresist and then etching that pattern into an amorphous carbon layer. Sidewall pacers having widths less than the widths of the un-etched parts of the amorphous carbon are formed on the sidewalls of the amorphous carbon. The amorphous carbon is then removed, leaving behind the sidewall spacers as a mask pattern.Type: ApplicationFiled: September 2, 2004Publication date: March 2, 2006Inventors: Mirzafer Abatchev, Gurtej Sandhu, Luan Tran, William Rericha, D. Durcan
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Publication number: 20050041228Abstract: A method and apparatus for exposing a radiation-sensitive material of a microlithographic substrate to a selected radiation. The method can include directing the radiation along a radiation path in a first direction toward a reticle, passing the radiation from the reticle and to the microlithographic substrate along the radiation path in a second direction, and moving the reticle relative to the radiation path along a reticle path generally normal to the first direction. The microlithographic substrate can move relative to the radiation path along a substrate path having a first component generally parallel to the second direction, and a second component generally perpendicular to the second direction. The microlithographic substrate can move generally parallel to and generally perpendicular to the second direction in a periodic manner while the reticle moves along the reticle path to change a relative position of a focal plane of the radiation.Type: ApplicationFiled: July 28, 2004Publication date: February 24, 2005Inventors: Ulrich Boettiger, Scott Light, William Rericha, Craig Hickman
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Patent number: 5849435Abstract: A method for forming a layer of resist on a non-planar substrate includes the steps of: dispensing resist onto the substrate; spinning the substrate to spread the resist; and then vibrating the substrate to eliminate voids in the resist. Optionally, the substrate can be inverted and vibrated at the same time to distribute the resist over the sidewalls of any projections or plateaus on the non-planar substrate. Following the vibrating and optional inversion steps, the resist is partially hardened, an edge bead is removed and a backside of the resist is washed. These steps are followed by soft bake, exposure and development of the layer of resist.Type: GrantFiled: March 4, 1997Date of Patent: December 15, 1998Assignee: Micron Technology, Inc.Inventors: Salman Akram, Paul Shirley, William Rericha
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Patent number: 5609995Abstract: A method for forming a layer of resist on a non-planar substrate includes the steps of: dispensing resist onto the substrate; spinning the substrate to spread the resist; and then vibrating the substrate to eliminate voids in the resist. Optionally, the substrate can be inverted and vibrated at the same time to distribute the resist over the sidewalls of any projections or plateaus on the non-planar substrate. Following the vibrating and optional inversion steps, the resist is partially hardened, an edge bead is removed and a backside of the resist is washed. These steps are followed by soft bake, exposure and development of the layer of resist.Type: GrantFiled: August 30, 1995Date of Patent: March 11, 1997Assignee: Micron Technology, Inc.Inventors: Salman Akram, Paul Shirley, William Rericha