Patents by Inventor William Richard Ezell

William Richard Ezell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6198329
    Abstract: A circuit and associated method for determining the offset bias of a comparator by first shorting together the inputs of the comparator to apply the same voltage signal at each of the inputs of the comparator. The voltage signal at one of the inputs is then offset a select amount by applying varying selected resistances from a variable resistor to the comparator. The variable resistor is controlled by a programmable controller that is responsive to an input clock signal. At each selected amount of offset applied to the input, the output is monitored to determine if the output of the comparator has flipped, or changed state. When the output flips, the corresponding resistance setting is used to compensate for the corresponding offset bias of the comparator.
    Type: Grant
    Filed: November 12, 1999
    Date of Patent: March 6, 2001
    Assignee: Dallas Semiconductor Corporation
    Inventors: William Richard Ezell, Robert Mounger
  • Patent number: 6011417
    Abstract: A circuit and associated method for determining the offset bias of a comparator by first shorting together the inputs of the comparator to apply the same voltage signal at each of the inputs of the comparator. The voltage signal at one of the inputs is then offset a select amount by applying varying selected resistances from a variable resistor to the comparator. The variable resistor is controlled by a programmable controller that is responsive to an input clock signal. At each selected amount of offset applied to the input, the output is monitored to determine if the output of the comparator has flipped, or changed state. When the output flips, the corresponding resistance setting is used to compensate for the corresponding offset bias of the comparator.
    Type: Grant
    Filed: September 15, 1998
    Date of Patent: January 4, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: William Richard Ezell, Robert Mounger
  • Patent number: 5812005
    Abstract: A circuit and associated method for determining the offset bias of a comparator by first shorting together the inputs of the comparator to apply the same voltage signal at each of the inputs of the comparator. The voltage signal at one of the inputs is then offset a select amount by applying varying selected resistances from a variable resistor to the comparator. The variable resistor is controlled by a programmable controller that is responsive to an input clock signal. At each selected amount of offset applied to the input, the output is monitored to determine if the output of the comparator has flipped, or changed state. When the output flips, the corresponding resistance setting is used to compensate for the corresponding offset bias of the comparator.
    Type: Grant
    Filed: July 30, 1996
    Date of Patent: September 22, 1998
    Assignee: Dallas Semiconductor Corp.
    Inventors: William Richard Ezell, Robert Mounger
  • Patent number: 5754037
    Abstract: The present invention regulates a power signal provided by a power source and includes two operational modes: a first mode capable of consuming low amounts of static power; and a second mode capable of smoothing voltage spikes appearing at high frequencies. The present invention further includes a generator, amplifier, and a regulator for controlling the power signal; a device for determining whether the present invention should be in the first or second operational mode; and a device for shifting between the first and second operational modes.
    Type: Grant
    Filed: July 30, 1996
    Date of Patent: May 19, 1998
    Assignee: Dallas Semiconductor Corporation
    Inventors: William Richard Ezell, Robert Mounger