Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for a radio frequency (RF) receiver including a dual-mode low noise amplifier (LNA). One of the methods includes configuring the RF receiver to a wideband mode including operation over a multiple receive frequency (RX) bands including multiple frequencies, receiving, by the RF receiver, an input RF signal, scanning the multiple frequencies to detect a transmitted frequency of the input RF signal, configuring the RF receiver to narrowband mode including operation over a proper subset of the RX bands including a proper subset of the multiple frequencies, and tuning the RF receiver to the transmitted frequency.

Abstract: An active balun amplifier includes a first plurality of metal oxide semiconductor (MOS) transistors arranged in series, the first plurality of MOS transistors comprising a first input transistor of a first conductivity type, a second input transistor of a second conductivity type, and at least two common-gate transistors arranged in series between the first input transistor and the second input transistor, wherein a gate of the first input transistor and a gate of the second input transistor are tied to a common input, a second plurality of MOS transistors arranged in series, the second plurality of MOS transistors comprising a first common-source transistor of the first conductivity type, a second common-source transistor of the second conductivity type, and at least two cascode transistors arranged in series between the first common-source transistor and the second common-source transistor.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for a tunable radio frequency (RF) low noise amplifier (LNA) circuit including an amplifier circuit, where the amplifier circuit is configured to receive an input RF signal from an RF input source and provide an amplified output RF signal, a bias resistor, where a first end of the bias resistor is operatively coupled to an input of the amplifier circuit, a digitally programmable bias circuit operatively coupled to a second end of the bias resistor, where the bias circuit outputs a reference voltage, and a programmable input impedance circuit operatively coupled between the first end of the bias resistor and a ground. The programmable input impedance circuit includes an input transconductor transistor and a programmable inductance network.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for radio frequency (RF) low noise amplifier (LNA) circuit configured to receive an input RF signal from an RF input source and provide an amplified output RF signal, where the RF LNA circuit includes an amplifier circuit, where the amplifier circuit is configured to receive the input RF signal and provide the amplified output RF signal, and an inductor-degenerated transconductor input impedance circuit that is separate from the amplifier circuit and that is operatively coupled to the input of the amplifier circuit.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for a programmable input impedance circuit for a radio frequency (RF) low noise amplifier (LNA) including a high impedance mode circuit and a low impedance mode circuit. The high impedance mode circuit includes an inductor-degenerated transconductor transistor, an inductor selectively coupled between a source of the inductor-degenerated transconductor transistor and a ground, and a capacitor coupled between a gate of the inductor-degenerated transconductor transistor and the source of the inductor-degenerated transconductor transistor. The low impedance mode circuit includes a shunt resistor selectively coupled between an RF input source and an alternating current (AC) ground.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for a radio frequency (RF) receiver including a dual-mode low noise amplifier (LNA). One of the methods includes configuring the RF receiver to a wideband mode including operation over a multiple receive frequency (RX) bands including multiple frequencies, receiving, by the RF receiver, an input RF signal, scanning the multiple frequencies to detect a transmitted frequency of the input RF signal, configuring the RF receiver to narrowband mode including operation over a proper subset of the RX bands including a proper subset of the multiple frequencies, and tuning the RF receiver to the transmitted frequency.

Abstract: The present disclosure relates to single-ended-to-differential amplifiers and radio frequency receivers. One example single-ended-to-differential amplifier includes a first inverting amplifier, a second inverting amplifier, and a third inverting amplifier. Both an input end of the first inverting amplifier and an input end of the second inverting amplifier are coupled to an input end of the single-ended-to-differential amplifier, an output end of the first inverting amplifier is coupled to an input end of the third inverting amplifier, an output end of the second inverting amplifier is coupled to a first output end of the single-ended-to-differential amplifier, and an output end of the third inverting amplifier is coupled to a second output end of the single-ended-to-differential amplifier. An impedance element is coupled between the input end of the first inverting amplifier and the output end of the first inverting amplifier.

Abstract: The present disclosure relates to single-ended-to-differential amplifiers and radio frequency receivers. One example single-ended-to-differential amplifier includes a first inverting amplifier, a second inverting amplifier, and a third inverting amplifier. Both an input end of the first inverting amplifier and an input end of the second inverting amplifier are coupled to an input end of the single-ended-to-differential amplifier, an output end of the first inverting amplifier is coupled to an input end of the third inverting amplifier, an output end of the second inverting amplifier is coupled to a first output end of the single-ended-to-differential amplifier, and an output end of the third inverting amplifier is coupled to a second output end of the single-ended-to-differential amplifier. An impedance element is coupled between the input end of the first inverting amplifier and the output end of the first inverting amplifier.

Abstract: An apparatus comprises a plurality of selectable gain stages connected in parallel between a first bias voltage and ground, wherein each selectable gain stage comprises an amplification portion and a current steering portion, and wherein the current steering portion comprises a first selectable signal path connected between an output of the amplification portion and a signal output terminal, and a second selectable signal path connected between the output of the amplification portion and ground through a shunt device.

Abstract: An apparatus comprises a plurality of selectable gain stages connected in parallel between a first bias voltage and ground, wherein each selectable gain stage comprises an amplification portion and a current steering portion, and wherein the current steering portion comprises a first selectable signal path connected between an output of the amplification portion and a signal output terminal, and a second selectable signal path connected between the output of the amplification portion and ground through a shunt device.

Abstract: An apparatus comprising an amplifier comprising an input, a capacitor having a capacitor first side and a capacitor second side, wherein the capacitor first side is coupled to the input, a switch having a switch first side and a switch second side, wherein the switch first side is coupled to the capacitor second side, and a transistor having a transistor gate, and a transistor source, wherein the transistor gate is coupled to the input and the capacitor first side, wherein the transistor source is coupled to the switch second side and wherein the switch is positioned directly between the capacitor second side and the transistor source.

Abstract: An apparatus comprising an amplifier comprising an input, a capacitor having a capacitor first side and a capacitor second side, wherein the capacitor first side is coupled to the input, a switch having a switch first side and a switch second side, wherein the switch first side is coupled to the capacitor second side, and a transistor having a transistor gate, and a transistor source, wherein the transistor gate is coupled to the input and the capacitor first side, wherein the transistor source is coupled to the switch second side and wherein the switch is positioned directly between the capacitor second side and the transistor source.

Abstract: An apparatus comprising an amplifier comprising an input, a capacitor having a capacitor first side and a capacitor second side, wherein the capacitor first side is coupled to the input, a switch having a switch first side and a switch second side, wherein the switch first side is coupled to the capacitor second side, and a transistor having a transistor gate, and a transistor source, wherein the transistor gate is coupled to the input and the capacitor first side, wherein the transistor source is coupled to the switch second side and wherein the switch is positioned directly between the capacitor second side and the transistor source.

Abstract: An apparatus comprising an amplifier comprising an input, a capacitor having a capacitor first side and a capacitor second side, wherein the capacitor first side is coupled to the input, a switch having a switch first side and a switch second side, wherein the switch first side is coupled to the capacitor second side, and a transistor having a transistor gate, and a transistor source, wherein the transistor gate is coupled to the input and the capacitor first side, wherein the transistor source is coupled to the switch second side and wherein the switch is positioned directly between the capacitor second side and the transistor source.

Abstract: A circuit comprising a transconductor amplifier, and a load connected to the transconductor amplifier, wherein the load comprises a load transistor that is passively biased.

Abstract: An edge seal structure and fabrication method are described. The edge seal structure includes a high impedance substrate containing a base material and a grounded floating edge seal that is on the substrate but is isolated from the base material. The edge seal contacts a first doped well in the substrate that has the same conductivity type as and is more heavily doped than the base material. The first doped well is in a second doped well that has a different conductivity type than the first doped well. The first and second doped wells and the base material form back-to-back series connected diodes. The wells are effectively connected to power and ground such that the diodes are reverse-biased. The edge seal is formed by a stack of conductive layers, at least some of which are surrounded by a stack of insulating layers.

Abstract: A closed loop audio amplifier system and method of powering up/down the system without producing audible artifacts are provided. During power up, a prebias voltage is provided to each output connected to a speaker to increase the voltage to a nominal output level. High impedance switches are then driven at a 50% duty cycle. Feedback from the output is supplied to a servo, which is enabled to fine tune the output voltage. Low impedance switches are then driven at a 50% duty cycle at a quarter cycle timing. The order of the feedback loop depends on which of the high or low impedance switches are driven. The prebias voltage is then removed before audio signals to be amplified are supplied to the system. Timing of driving of the switches is programmable. To power down,. essentially the reverse sequence is provided.

Abstract: An audio amplifier includes a digital signal processor (DSP) that contains a noise shaping quantizer having an integrating error amplifier. The integrating error amplifier contains integrators connected in a feedback loop, a summer supplied with an output of each of the integrators, and a saturation function module producing a saturation function. A multiplier is disposed between each pair of adjacent integrators. The multiplier receives a signal from one of the adjacent integrators and the saturation function and supplies a signal to the other of the adjacent integrators. The saturation function decreases the effect of all of the integrators except an integrator to which an input signal to the integrating amplifier is supplied using an input signal to and/or an output signal from the noise shaping quantizer. This permits the duty ratio of the output signal from the noise shaping quantizer to extend from 0% to 100%.

Abstract: Disclosed is a method and/or apparatus for adjusting the sample time and order associated with a digital correction system for maximizing output power and minimizing power stage delay sensitivity of a switching power stage. In certain embodiments, the sample point of an ADC may be changed as a function of the duty ratio of the PWM signal thus allowing higher performance and use of less expensive power stage components. In addition, adjustment of the order of an integrating error amplifier in the system permits operation of the power stage with an output being permitted to saturate up to the power supply rails, thus increasing a power output of the power stage.

Abstract: A switching amplifier generates noise at its switching frequency and harmonics thereof. The noise at these harmonics, for an audio amplifier, will be generated with significant amplitude in the AM band. Thus, an AM tuner will experience interference problems if the tuner frequency is sufficiently close to one of these harmonics. To avoid this problem the switching frequency of the switching amplifier is chosen based on the tuner frequency. Thus, the switching frequency is chosen to avoid having harmonics at or too near the chosen tuner frequency. The switching amplifier is disabled when the tuner is in seek or scan mode. Instead of using the tuner frequency to determine what switching frequency should be used to avoid interference, the interference can be detected directly to cause a change in the switching frequency and thus remove the interference.