Patents by Inventor William S. Egr

William S. Egr has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7020723
    Abstract: A communications system for enabling extension of an internal common bus architecture (CBA) segment of a first root physical device to an internal CBA bus segment of one or more remote external physical device includes the first root physical device having a first serial communications interface module in the root device coupled between said internal CBA bus segment and an input and output port of the root device for serializing bus transactions from the first device to the output port of the root device and deserializing data received from at the input port to the internal CBA bus segment of the first device. The remote external physical device includes a second serial communications interface module coupled between the internal CBA bus segment and an input and output port of the remote device for serializing bus transactions from the remote device to the output port of the remote device and deserializing data received at the input port to the internal CBA bus segment of said remote device.
    Type: Grant
    Filed: April 23, 2003
    Date of Patent: March 28, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Denis R. Beaudoin, Gregory Guyotte, Michael J. Hanrahan, William S. Egr
  • Publication number: 20040226025
    Abstract: A method of providing an operating system independent interface between an operating system (OS) and a communications processor media access control MAC (CPMAC) is provided that includes providing a communications processor Hardware Abstraction Layer (CPHAL) between the OS and a driver with the driver communicating to said CPHAL layer which communicates with the communications hardware processor media access control MAC. The operating system passes information to the CPHAL and the CPHAL at a later time returning the information and wherein said CPHAL passes information to the OS in the same way. The Communications Processor Hardware Abstraction Layer (CPHAL) comprises hooks so that the OS-specific coding is embedded into said CPHAL. The start-up initialization between CPHAL and the OS includes providing a protocol that allows the CPHAL to pass details of its feature set and allows CPHAL to retrieve information from the OS.
    Type: Application
    Filed: May 9, 2003
    Publication date: November 11, 2004
    Inventors: Denis R. Beaudoin, Michael J. Hanrahan, Gregory Guyotte, William S. Egr
  • Publication number: 20040215861
    Abstract: A communications system for enabling extension of an internal common bus architecture (CBA) segment of a first root physical device to an internal CBA bus segment of one or more remote external physical device includes the first root physical device having a first serial communications interface module in the root device coupled between said internal CBA bus segment and an input and output port of the root device for serializing bus transactions from the first device to the output port of the root device and deserializing data received from at the input port to the internal CBA bus segment of the first device. The remote external physical device includes a second serial communications interface module coupled between the internal CBA bus segment and an input and output port of the remote device for serializing bus transactions from the remote device to the output port of the remote device and deserializing data received at the input port to the internal CBA bus segment of said remote device.
    Type: Application
    Filed: April 23, 2003
    Publication date: October 28, 2004
    Inventors: Denis R. Beaudoin, Gregory S. Guyotte, Michael J. Hanrahan, William S. Egr
  • Patent number: 5269021
    Abstract: An interface for use with a multiprocessor computer system, having a host processor system and a graphics processor system. The interface permits extended functions to be developed on the host system or on another system, and subsequently loaded to the graphics processor system. The interface comprises software residing on both the host system side and the graphics system side, which operates at run time to permit the function to be called from a main program running on the host. The function's arguments are passed to the graphics system so that the function is executed by the graphics processor.
    Type: Grant
    Filed: October 12, 1989
    Date of Patent: December 7, 1993
    Assignee: Texas Instruments Incorporated
    Inventors: Michael A. Denio, William S. Egr, Douglas C. Crawford, Michael D. Asal, Graham Short, James G. Littleton, Jerry R. Van Aken