Patents by Inventor William Scherer

William Scherer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230119649
    Abstract: A network intrusion system for a protected network includes a ruleset module configured to receive metadata for rules. The metadata describes, for each of the rules, a set of associated network vulnerabilities. The ruleset module is configured to access vulnerability information describing a set of cumulative vulnerabilities that each is present in at least one network device within the protected network. The network intrusion system includes a rule management module configured to, for each rule of the plurality of rules: identify the set of associated network vulnerabilities described by the metadata for the rule, determine whether there is a match between any of the set of associated network vulnerabilities and the set of cumulative vulnerabilities, and, in response to determining that there is no match, transmit a first command signal to a network security module. The first command signal instructs the network security module to disable the rule.
    Type: Application
    Filed: December 16, 2022
    Publication date: April 20, 2023
    Applicant: TD Ameritrade IP Company, Inc.
    Inventors: Brandon William SCHERER, John Scott KULA
  • Patent number: 11599708
    Abstract: Data is organized in a hierarchical data tree having nodes, and is formatted in human-readable data according to a schema. The data is canonically ordered in correspondence with a canonical ordering of a schema dictionary generated from the schema. The canonically ordered data is encoded into binary, including for each node, removing a label of the node, and adding a sequence number of the node corresponding to the canonical ordering, in binary.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: March 7, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: William Scherer, III, Michael Garrett, Jeffrey Hilland
  • Patent number: 11563777
    Abstract: A network intrusion system for a protected network includes a ruleset module configured to receive metadata for rules. The metadata describes, for each of the rules, a set of associated network vulnerabilities. The ruleset module is configured to access vulnerability information describing a set of cumulative vulnerabilities that each is present in at least one network device within the protected network. The network intrusion system includes a rule management module configured to, for each rule of the plurality of rules: identify the set of associated network vulnerabilities described by the metadata for the rule, determine whether there is a match between any of the set of associated network vulnerabilities and the set of cumulative vulnerabilities, and, in response to determining that there is no match, transmit a first command signal to a network security module. The first command signal instructs the network security module to disable the rule.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: January 24, 2023
    Assignee: TD Ameritrade IP Company, Inc.
    Inventors: Brandon William Scherer, John Scott Kula
  • Publication number: 20220103595
    Abstract: A network intrusion system for a protected network includes a ruleset module configured to receive metadata for rules. The metadata describes, for each of the rules, a set of associated network vulnerabilities. The ruleset module is configured to access vulnerability information describing a set of cumulative vulnerabilities that each is present in at least one network device within the protected network. The network intrusion system includes a rule management module configured to, for each rule of the plurality of rules: identify the set of associated network vulnerabilities described by the metadata for the rule, determine whether there is a match between any of the set of associated network vulnerabilities and the set of cumulative vulnerabilities, and, in response to determining that there is no match, transmit a first command signal to a network security module. The first command signal instructs the network security module to disable the rule.
    Type: Application
    Filed: September 25, 2020
    Publication date: March 31, 2022
    Inventors: Brandon William SCHERER, John Scott KULA
  • Publication number: 20210192124
    Abstract: Data is organized in a hierarchical data tree having nodes, and is formatted in human-readable data according to a schema. The data is canonically ordered in correspondence with a canonical ordering of a schema dictionary generated from the schema. The canonically ordered data is encoded into binary, including for each node, removing a label of the node, and adding a sequence number of the node corresponding to the canonical ordering, in binary.
    Type: Application
    Filed: March 10, 2021
    Publication date: June 24, 2021
    Inventors: William SCHERER, III, Michael GARRETT, Jeffrey HILLAND
  • Patent number: 10977221
    Abstract: Data is organized in a hierarchical data tree having nodes, and is formatted in human-readable data according to a schema. The data is canonically ordered in correspondence with a canonical ordering of a schema dictionary generated from the schema. The canonically ordered data is encoded into binary, including for each node, removing a label of the node, and adding a sequence number of the node corresponding to the canonical ordering, in binary.
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: April 13, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: William Scherer, III, Jeffrey R. Hilland, Michael R. Garrett
  • Patent number: 10540227
    Abstract: A high performance computing system including processing circuitry and a shared fabric memory is disclosed. The processing circuitry includes processors coupled to local storages. The shared fabric memory includes memory devices and is coupled to the processing circuitry. The shared fabric memory executes a first sweep of a stencil code by sequentially retrieving data stripes. Further, for each retrieved data stripe, a set of values of the retrieved data stripe are updated substantially simultaneously. For each retrieved data stripe, the updated set of values are stored in a free memory gap adjacent to the retrieved data stripe. For each retrieved data stripe, the free memory gap is advanced to an adjacent memory location. A sweep status indicator is incremented from the first sweep to a second sweep.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: January 21, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Charles Johnson, Onkar Patil, Mesut Kuscu, Tuan Tran, Joseph Tucek, Harumi Kuno, Milind Chabbi, William Scherer
  • Publication number: 20190205205
    Abstract: A high performance computing system including processing circuitry and a shared fabric memory is disclosed. The processing circuitry includes processors coupled to local storages. The shared fabric memory includes memory devices and is coupled to the processing circuitry. The shared fabric memory executes a first sweep of a stencil code by sequentially retrieving data stripes. Further, for each retrieved data stripe, a set of values of the retrieved data stripe are updated substantially simultaneously. For each retrieved data stripe, the updated set of values are stored in a free memory gap adjacent to the retrieved data stripe. For each retrieved data stripe, the free memory gap is advanced to an adjacent memory location. A sweep status indicator is incremented from the first sweep to a second sweep.
    Type: Application
    Filed: January 3, 2018
    Publication date: July 4, 2019
    Inventors: Charles Johnson, Onkar Patil, Mesut Kuscu, Tuan Tran, Joseph Tucek, Harumi Kuno, Milind Chabbi, William Scherer
  • Publication number: 20190121880
    Abstract: Data is organized in a hierarchical data tree having nodes, and is formatted in human-readable data according to a schema. The data is canonically ordered in correspondence with a canonical ordering of a schema dictionary generated from the schema. The canonically ordered data is encoded into binary, including for each node, removing a label of the node, and adding a sequence number of the node corresponding to the canonical ordering, in binary.
    Type: Application
    Filed: October 20, 2017
    Publication date: April 25, 2019
    Inventors: William Scherer, III, Jeffrey R. Hilland, Michael R. Garrett
  • Publication number: 20050086133
    Abstract: The invention relates to a system and methods for sensing and analyzing inventory levels and consumer buying habits. The system includes a sensor pad that can be easily installed on a display shelf by simply resting the panel on the shelf. Sensors are mounted inside the sensor pad that are hardwired to circuitry collectively called a smart hub. The hub is a programmable device with an integrated paging transceiver for communicating with a remotely located server that is managed by the inventory sensing service provider. The hub periodically transmits a report, which is highly configurable, to the service provider's server, preferably as a text message over the paging network, which arrives at a service provider's server after being converted to an e-mail. This server converts the information in the reports into inventory data and stores this data in a database that customers of the inventory service can access remotely.
    Type: Application
    Filed: January 8, 2004
    Publication date: April 21, 2005
    Inventors: William Scherer, Ronald Bane