Patents by Inventor William Shearon

William Shearon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080204958
    Abstract: A current-limiting switch circuit including a first power semiconductor switch, at least one sense semiconductor switch configured to share a common-gate and a common drain with the first power semiconductor switch, and a second power semiconductor switch serially connected to the first power semiconductor switch and sharing a common node therebetween. The first power semiconductor switch, the first sense semiconductor switch, and the second power semiconductor switch are configured to limit at least a back current.
    Type: Application
    Filed: February 27, 2008
    Publication date: August 28, 2008
    Applicant: INTERSIL AMERICAS INC.
    Inventors: William Shearon, Mauricio Zavaleta
  • Publication number: 20050184809
    Abstract: The current limiting circuit of the present invention includes a transconductance amplifier having two outputs and forming a conventional feedback loop. A first output connects to an output transistor and a second output is a replica output used to form a rapid response feedforward path to control the gate of the output transistor, for example, an external MOSFET.
    Type: Application
    Filed: July 8, 2004
    Publication date: August 25, 2005
    Applicant: Intersil Americas Inc.
    Inventors: Sumer Can, William Shearon, Raymond Giordano
  • Publication number: 20050105307
    Abstract: A tracking soft start circuit architecture contains a plurality of soft start circuits for generating a plurality of soft start voltages during startup for application to associated power supply terminals of a power supply system. The soft start circuits are interconnected in such a manner that prevents any soft start circuit from generating a soft start voltage waveform until all of the controlled power output devices have been brought to the same prescribed state of operation, that is, all power FET gates are precharged and their source voltages match each other.
    Type: Application
    Filed: January 14, 2004
    Publication date: May 19, 2005
    Applicant: Intersil Americas Inc. State of Incorporation: Delaware
    Inventors: William Shearon, Raymond Giordano, Sumer Can
  • Patent number: 6727745
    Abstract: The integrated circuit includes a power driving device, and a pilot device for sensing current through the power driving device. The pilot device includes a composite pilot having a plurality of series connected transistors and which is at least active while the power driving device is in a linear mode, and a secondary pilot which is active while the power driving device is in a saturation mode. Also, a control circuit activates the secondary pilot.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: April 27, 2004
    Assignee: Intersil Americas Inc.
    Inventors: William Shearon, Salomon Vulih, Donald Preslar
  • Patent number: 6603358
    Abstract: The integrated circuit includes a power FET for generating an output voltage, a pilot FET for sensing current through the power driving device and generating a reference voltage, and an amplifier circuit for comparing the reference voltage of the pilot device with the output voltage of the power driving device. The amplifier circuit includes a differential pair of matched bipolar junction transistors (BJTs) having a common base. A first BJT of the differential pair being diode-connected. The amplifier circuit controls the gates of the power FET and the pilot FET.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: August 5, 2003
    Assignee: Intersil Americas Inc.
    Inventors: William Shearon, Salomon Vulih, Donald Preslar
  • Publication number: 20020024786
    Abstract: The integrated circuit includes a power driving device, and a pilot device for sensing current through the power driving device. The pilot device includes a composite pilot having a plurality of series connected transistors and which is at least active while the power driving device is in a linear mode, and a secondary pilot which is active while the power driving device is in a saturation mode. Also, a control circuit activates the secondary pilot.
    Type: Application
    Filed: August 13, 2001
    Publication date: February 28, 2002
    Applicant: Intersil Americas, Inc.
    Inventors: William Shearon, Salomon Vulih, Donald Preslar
  • Publication number: 20020024386
    Abstract: The integrated circuit includes a power FET for generating an output voltage, a pilot FET for sensing current through the power driving device and generating a reference voltage, and an amplifier circuit for comparing the reference voltage of the pilot device with the output voltage of the power driving device. The amplifier circuit includes a differential pair of matched bipolar junction transistors (BJTs) having a common base. A first BJT of the differential pair being diode-connected. The amplifier circuit controls the gates of the power FET and the pilot FET.
    Type: Application
    Filed: August 13, 2001
    Publication date: February 28, 2002
    Applicant: Intersil Americas Inc.
    Inventors: William Shearon, Salomon Vulih, Donald Preslar