Abstract: A method for compiler assisted victim cache bypassing including: identifying a cache line as a candidate for victim cache bypassing; conveying a bypassing-the-victim-cache information to a hardware; and checking a state of the cache line to determine a modified state of the cache line, wherein the cache line is identified for cache bypassing if the cache line that has no reuse within a loop or loop nest and there is no immediate loop reuse or there is a substantial across loop reuse distance so that it will be replaced from both main and victim cache before being reused.

Abstract: A system and method for cache management in a data processing system. The data processing system includes a processor and a memory hierarchy. The memory hierarchy includes at least an upper memory cache, at least a lower memory cache, and a write-back data structure. In response to replacing data from the upper memory cache, the upper memory cache examines the write-back data structure to determine whether or not the data is present in the lower memory cache. If the data is present in the lower memory cache, the data is replaced in the upper memory cache without casting out the data to the lower memory cache.

Abstract: A data processing unit, method, and computer-usable medium for contention-based cache performance optimization. Two or more processing cores are coupled by an interconnect. Coupled to the interconnect is a memory hierarchy that includes a collection of caches. Resource utilization over a time interval is detected over the interconnect. Responsive to detecting a threshold of resource utilization of the interconnect, a functional mode of a cache from the collection of caches is selectively enabled.

Abstract: A system and method of managing cache hierarchies with adaptive mechanisms. A preferred embodiment of the present invention includes, in response to selecting a data block for eviction from a memory cache (the source cache) out of a collection of memory caches, examining a data structure to determine whether an entry exists that indicates that the data block has been evicted from the source memory cache, or another peer cache, to a slower cache or memory and subsequently retrieved from the slower cache or memory into the source memory cache or other peer cache. Also, a preferred embodiment of the present invention includes, in response to determining the entry exists in the data structure, selecting a peer memory cache out of the collection of memory caches at the same level in the hierarchy to receive the data block from the source memory cache upon eviction.

Abstract: A system and method for cache management in a data processing system. The data processing system includes a processor and a memory hierarchy. The memory hierarchy includes at least an upper memory cache, at least a lower memory cache, and a write-back data structure. In response to replacing data from the upper memory cache, the upper memory cache examines the write-back data structure to determine whether or not the data is present in the lower memory cache. If the data is present in the lower memory cache, the data is replaced in the upper memory cache without casting out the data to the lower memory cache.

Abstract: A process for forming reactants useful in the manufacture of polyethylene terephthalate includes the steps of: (a) contacting recyclable polyethylene terephthalate with ammonium hydroxide whereby a mixture of ammonium terephthalate and ethylene glycol is formed, (b) separating the ammonium terephthalate, and (c) heating said ammonium terephthalate at a temperature from about 225° C. to about 300° C. to produce terephthalic acid.

Abstract: Disclosed herein is a process for depolymerizing and purifying recyclable PET comprising the steps of: (a) conducting acetolysis on recyclable PET to form terephthalic acid and ethylene glycol diacetate; (b) reacting the terephthalic acid with methanol to form dimethyl terephthalate; and (c) reacting the dimethyl terephthalate with the ethylene glycol diacetate under transesterification and polycondensation conditions to form both a PET product with an unusually low concentration of copolymerized diethylene glycol and methyl acetate. Further disclosed is a process wherein the above process is efficiently combined with a process for producing cellulose acetate. In addition to steps (a)-(c), the combination process additionally comprises the steps of: (d) carbonylating the methyl acetate with carbon monoxide to form acetic anhydride; and (e) acetylating cellulose with the acetic anhydride to form cellulose acetate and acetic acid, with the acetic acid being useful in step (a).

Abstract: Disclosed herein is a process for depolymerizing and purifying contaminated post-consumer polyester. In the process, depolymerization is effected by way of glycolysis in an agitated reactor vessel. The process includes the steps of contacting a contaminated polyester with an amount of a glycol to provide a molar ratio of greater than about 1 to about 5 total glycol units to total dicarboxylic acid units at a temperature between about 150 to about 300° C. and an absolute pressure of about 0.5 to about 3 bars. This reaction is conducted for a time sufficient to produce, in the reactor, an upper layer having a relatively low density contaminant floating on top of a lower layer which includes a relatively high density depolymerized oligomer of the polyester, and separating the upper layer from the lower layer. The layers may be separated by removing the upper layer from the reactor in a first stream and removing said lower layer from the reactor in a second stream.