Abstract: A metal nitride oxide semiconductor device capable of use within a memory cell, having a more heavily doped region of the same type as the substrate provided directly under the channel of the depletion mode device. Application of a positive write voltage to the gate of the device, with the substrate at 0 volts potential and the source and drain biased to a suitable positive level, results in avalanche operation of the device whereby charge is stored in a nitride oxide interface under the gate, thereby converting the device to enhancement mode operation. The charge can be removed with the source and drain biased to the 0 volt potential of the substrate and a positive erase signal applied to the gate. A four device memory cell is disclosed.

Abstract: An integrated circuit structure with full dielectric isolation, i.e., the electrical isolation is provided by electrically insulative material, is formed by ion bombarding a silicon substrate with ions such as nitrogen, oxygen or carbon to implant subsurface region containing such ions and heating the resulted bombarded substrate to a temperature sufficient to react the introduced ions with the substrate to form a subsurface layer which has a different etchability than silicon. An epitaxial layer of monocrystalline silicon is then deposited on the substrate, after which a pattern of regions of electrically insulating material is formed extending through the epitaxial layer beyond the substrate surface into contact with the subsurface layer to laterally surround a plurality of pockets in said silicon. An electrically insulative layer is formed on the surface of the epitaxial layer continuous with the electrically insulating lateral regions.