Patents by Inventor William T. Blank

William T. Blank has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150277841
    Abstract: Embodiments relating to a multi-mode display device are disclosed. For example in one disclosed embodiment a multimode display device includes a principal and a secondary image display mounted in a common housing configure to alternately emit light through a common transparent region in the viewing surface. The multimode display device is configured to display a first image on the principal image display at a first resolution or display a second image on the secondary image display of higher resolution than the first image and on a virtual plane behind the viewing surface of the display device. The multi-mode display device is configured to compare the a detected eye relief distance to a predetermined threshold and display the image on the appropriate image display and set the other image display to a non-display state.
    Type: Application
    Filed: March 27, 2014
    Publication date: October 1, 2015
    Applicant: Microsoft Corporation
    Inventors: Jaron Lanier, Joel S. Kollin, William T. Blank, Douglas C. Burger, Patrick Therien
  • Publication number: 20150193102
    Abstract: Embodiments relating to a wearable multi-mode display system actuatable by a wrist or hand are disclosed. For example, in one disclosed embodiment a first compact image is displayed in a first display mode via a display device, with the first compact image having a display resolution corresponding to a first application. While in the first display mode, a principal user input is received from the user's wrist or hand. In response, a second, different compact image is displayed. When the device is less than a predetermined distance from the user, an application image is displayed in a second display mode, with the application image having a greater display resolution. While in the second display mode, a secondary user input is received from the user's wrist or hand. In response, a graphical user interface element is controlled within the application image.
    Type: Application
    Filed: January 8, 2014
    Publication date: July 9, 2015
    Applicant: Microsoft Corporation
    Inventors: Jaron Lanier, Joel S. Kollin, William T. Blank, Doug Burger, Patrick Therien, Jason L. Waskey, Ian Wood, Raymond W. Riley
  • Patent number: 7822835
    Abstract: A logically centralized physically distributed Internet protocol (IP) network-connected devices configuration is disclosed. The technology initially receives configuration information regarding an IP network-connected devices configuration. The configuration information is then disseminated to a plurality of devices coupled with the IP network-connected devices configuration. At least a portion of the IP network-connected devices configuration with a related timestamp is then stored on any of the plurality of devices having a datastore thereon. In so doing, the IP network-connected devices configuration is physically distributed and at least partially replicated such that when a comparison of a status information with respect to at least one of the network-connected devices, the status information having a most recent timestamp associated therewith is relied upon.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: October 26, 2010
    Assignee: Microsoft Corporation
    Inventors: Robert G. Atkinson, William T. Blank
  • Publication number: 20080189397
    Abstract: A logically centralized physically distributed Internet protocol (IP) network-connected devices configuration is disclosed. The technology initially receives configuration information regarding an IP network-connected devices configuration. The configuration information is then disseminated to a plurality of devices coupled with the IP network-connected devices configuration. At least a portion of the IP network-connected devices configuration with a related timestamp is then stored on any of the plurality of devices having a datastore thereon. In so doing, the IP network-connected devices configuration is physically distributed and at least partially replicated such that when a comparison of a status information with respect to at least one of the network-connected devices, the status information having a most recent timestamp associated therewith is relied upon.
    Type: Application
    Filed: February 1, 2007
    Publication date: August 7, 2008
    Applicant: Microsoft Corporation
    Inventors: Robert G. Atkinson, William T. Blank
  • Patent number: 5488694
    Abstract: To effect a block data transfer between a plurality of physical I/O devices coupled through interfaces to an I/O channel ("IOC") bus, a source logical device is established by programmably assigning to each of the physical device interfaces a logical device identifier, a leaf identifier determining when the physical device participates relative to the first data transfer in the block data transfer, a burst count specifying the number of consecutive transfers for which the physical device is responsible when its interleave period arrives, and an interleave factor identifying how often the physical device participates in the block data transfer. A destination logical device is similarly established. The source and logical devices are then activated to accomplish a block transfer of data between them.
    Type: Grant
    Filed: August 28, 1992
    Date of Patent: January 30, 1996
    Assignee: MasPar Computer Company
    Inventors: Mark P. McKee, John Zapisek, David M. Bulfer, John M. Long, John R. Nickolls, William T. Blank
  • Patent number: 5243699
    Abstract: A massively parallel processor includes an array of processor elements (20), of PEs, and a multi-stage router interconnection network (30), which is used both for I/O communications and for PE to PE communications. The I/O system (10) for the massively parallel processor is based on a globally shared addressable I/O RAM buffer memory (50) that has address and data buses (52) to the I/O devices (80, 82) and other address and data buses (42) which are coupled to a router I/O element array (40). The router I/O element array is in turn coupled to the router ports (e.g. S2.sub.-- 0.sub.-- X0) of the second stage (430) of the router interconnection network. The router I/O array provides the corner turn conversion between the massive array of router lines (32) and the relatively few buses (52) to the I/O devices.
    Type: Grant
    Filed: December 6, 1991
    Date of Patent: September 7, 1993
    Assignee: MasPar Computer Corporation
    Inventors: John R. Nickolls, Won S. Kim, John Zapisek, William T. Blank
  • Patent number: 4939642
    Abstract: A single instruction multiple data parallel processor has a rectangular array of processing elements which is smaller than the array of data to be processed. The array of data to be processed is divided into a number of segments, each equal in size to the processing element array. Each processing element includes a memory for storing one or more data values corresponding to one data element in each of these segments of the data array. To execute an instruction on all the data, the processing elements execute the instruction on one segment of the data array at a time, repeating the process until all the data has been processed. To do this, a primary address controller generates a sequence of segment address values for each instruction to be executed. The processing elements along the periphery of the processing element array are called edge processing elements.
    Type: Grant
    Filed: October 24, 1989
    Date of Patent: July 3, 1990
    Assignee: The Board of Trustees of the Leland Stanford Jr. University
    Inventor: William T. Blank