Abstract: An I/O subsystem having a processor, a bridge unit, and an I/O messaging unit that couple a primary, secondary and tertiary bus in a computer system. The bridge unit is configurable to claim requests that access a messaging unit (MU) address range from the secondary bus, the MU itself being coupled to the primary bus. The MU interrupts the processor when an I/O request is posted, in response to which the processor reads from the MU pointers to an I/O messages and may then execute the I/O message. To promote the portability of software written for agents on either the primary or the secondary bus that wish to access the MU, the primary and secondary address translation units of the I/O subsystem are programmed to claim the same address translation window, where the MU address range is a portion of the primary ATU address translation window, and the secondary ATU is configured to not claim requests within the MU address range.

Abstract: In a method according to an example embodiment of the invention, a data packet is transferred from an I/O node to a host across a channel-based switching fabric interconnect. The method stores a value in a register in the I/O node which is indicative of a number of send credits available to the I/O node. The I/O node keeps a count of the number of data transfers. It is then determined from the value of the register whether or not a sufficient number of send credits is available to the I/O node for the data to be transferred by comparing it with the count of previous data transfers. If a sufficient number of send credits is available to the I/O node, it promptly transfers the data to the host over the channel-based switching fabric interconnect. If a sufficient number of send credits is not available to the I/O node, it waits for the host to update the value stored in the register before transferring data.

Abstract: Briefly, in accordance with one embodiment of the invention, a method of processing interrupts includes the following. An interrupt status message is transmitted after detecting a change in state of an interrupt. Briefly, in accordance with another embodiment of the invention, a method of processing interrupts includes the following. After receiving an end of interrupt (EOI) signal interrupting signals until an interrupt status message indicating that the interrupt state is current is recieved.

Abstract: In an example embodiment, a data transfer method adaptively transfers data from a host device to a target device across a channel-based interconnect. The method includes determining whether or not the size of the data to be transferred is greater than the maximum payload of a cell for the channel-based interconnect. If the size of the data to be transferred is not greater than the maximum payload, then a single cell is transferred from the host device to the target device which includes all of the data. If the size of the data to be transferred is greater than the maximum payload, then a request message is transferred from the host device to the target device. The request message includes a portion of said data to be transferred and control information indicating that not all of the data to be transferred is included in the request message.

Abstract: In an example embodiment, a data transfer method adaptively transfers data from a host device to a target device across a channel-based interconnect. The method includes determining whether or not the size of the data to be transferred is greater than the maximum payload of a cell for the channel-based interconnect. If the size of the data to be transferred is not greater than the maximum payload, then a single cell is transferred from the host device to the target device which includes all of the data. If the size of the data to be transferred is greater than the maximum payload, then a request message is transferred from the host device to the target device. The request message includes a portion of said data to be transferred and control information indicating that not all of the data to be transferred is included in the request message.

Abstract: A method is provided for remotely executing a bus transaction. The method includes the steps of detecting a bus transaction on a first bus located at a first node, identifying, based on the memory address of the bus transaction, that the first bus transaction is directed to a second node that is remotely located from the first node. The method also includes the steps of wrapping the first bus transaction in a packet for transmission over a network, transmitting the packet over the network to the second node and then unwrapping the first bus transaction from the packet received at the second node. The method further includes the steps of converting the first bus transaction to a second bus transaction that can be executed on a second bus located at the second node and outputting the converted second bus transaction onto the second bus to be executed.

Abstract: The invention, in one embodiment, is a method for accessing memory. The method includes programming a remote DMA engine from a destination; accessing data in the memory with the DMA engine, the DMA engine operating as programmed by the destination; and transferring the accessed data to the destination.

Abstract: A method and apparatus for write-only message queuing that allows messages to be passed between devices in a system through use of write operations only. Because the present invention passes information between devices using write operations rather than read operations information can be passed more efficiently than use of both read and write operations to pass the same information. Conceptually, the present invention provides a queue that stores indicators of work to be processed (e.g., data, pointers to data). The queue also has free space that can be used to store newly arriving work to be processed. A device producing work to be stored in the queue (producer) stores indications of one or more of: the start of free space (free space head pointer), the top of work to be processed (work list head pointer) and the end of the free space (free space tail pointer).

Abstract: A distributed computer system includes a host CPU, a network/host bridge, a network/I/O bridge and one or more I/O devices. The host CPU can generate a locked host transaction, which is wrapped in a packet and transmitted over a network to the remote I/O device for replay. The remote I/O devices can generate interrupts. The interrupt is wrapped in a packet and transmitted to the host computer for replay as an interrupt. The host CPU then executes the appropriate interrupt service routine to process the interrupt routine. The remote location of the I/O device with respect to the host CPU is transparent to the CPU and I/O devices. The bridges perform wrapping and unwrapping of host and I/O transactions for transmission across a network.

Abstract: A message unit that provides a hardware queue interface between a host processor and a local processor handling I/O operations in an I/O platform. Circuitry manages the head and tail pointers of an inbound free queue, an inbound post queue, an outbound free queue and an outbound post queue. Circuitry is also provided for enabling a host processor or bus agent to access these queues in a single bus transaction by reading or writing inbound port registers or outbound port registers. The queue elements contain handles of message buffers. The invention automatically performs the specific task of locating the next element in a queue, altering that element, and modifying a queue descriptor (i.e., a head or a tail pointer) to indicate the next element for a next queue access. A plurality of registers are used for selectively interrupting either the host processor or the local processor when the queues are written to by either the host processor, a bus agent, or the local processor.

Abstract: An I/O device driver is shared between a number of processes within a computer system while security and protection for system memory is maintained. Controlled access to the I/O device is provided by managing an authorized list in an I/O processor which is used to keep track of users of the I/O device according to types of claims for access to the I/O device. Claim types include primary, authorized, secondary, and management.

Abstract: The invention, in one embodiment, is a method for accessing memory. The method includes programming a remote DMA engine from a destination; accessing data in the memory with the DMA engine, the DMA engine operating as programmed by the destination; and transferring the accessed data to the destination.

Abstract: A virtual connection created between an application program and a selected I/O device is used as a communications medium for controlling I/O processing of the I/O device by the application program. The virtual connection is implemented as a system area network connecting a process of the application program and the I/O device. The application program registers the application program's memory that the application program shares with the I/O device (i.e., gives access rights to the I/O device) with the system area network. Once the virtual connection is created and initialized, the application program uses the virtual connection to send request messages for I/O services to the I/O device and to receive reply messages from the I/O device. The I/O device uses the virtual connection to obtain source data from the application program's memory for I/O write operations and to transfer data to the application program's memory for I/O read operations.

Abstract: A first host system directs an I/O device to transfer data directly between a requesting application program's buffers on a second host system and an I/O unit coupled to the I/O device without the need to pass through the first host system. Since the first host system retains control of the I/O request, it maintains security and protection features at the same time as realizing increases in performance gained from not having to participate in the actual data transfer. This direct movement capability supports peer-to-peer operation where a number of different I/O units, each with its own physical memory addressing domain, require access to the same I/O device. The direct movement capability is also useful in clustered systems. Clustered host systems are allowed direct access to an I/O device for data transfer without intervention by the host system owning the I/O device.

Abstract: A message unit that provides a hardware queue interface between a host processor and a local processor handling I/O operations in an I/O platform. Circuitry manages the head and tail pointers of an inbound free queue, an inbound post queue, an outbound free queue and an outbound post queue. Circuitry is also provided for enabling a host processor or bus agent to access these queues in a single bus transaction by reading or writing inbound port registers or outbound port registers. The queue elements contain handles of message buffers. The invention automatically performs the specific task of locating the next element in a queue, altering that element, and modifying a queue descriptor (i.e., a head or a tail pointer) to indicate the next element for a next queue access. A plurality of registers are used for selectively interrupting either the host processor or the local processor when the queues are written to by either the host processor, a bus agent, or the local processor.

Abstract: A computer system having a bus providing signals for determining a next bus transaction; a processor connected to the bus; and a bus device connected to the bus, the bus device having a first register connected to the bus, a first gate connected to the first register through an output of the first gate, and, a multiple access inhibitor unit connected to a first input of the first gate through an output of the multiple access inhibitor unit.

Abstract: A dataframe filter is provided a local area network bridge to monitor the dataframes transmitted on one network to determine those dataframes destined to be communicated to another network by the network bridge. The filter receives and examines the destination address of each dataframe communicated on the one filter and, searching through a database maintained by the filter, determine whether the destination address is located on the second network and, if so, signals the bridge to copy the dataframe to the second network.

Abstract: A dataframe filter is provided a local area network bridge to monitor the dataframes transmitted on one network to determine those dataframes destined to be communicated to another network by the network bridge. The filter receives and examines the destination address of each dataframe communicated on the one filter and, searching through a database maintained by the filter, determine whether the destination address is located on the second network and, if so, signals the bridge to copy the dataframe to the second network.