Patents by Inventor William Tai

William Tai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170345327
    Abstract: According to embodiments of the disclosed technology, a study method and system are provided for motivating students to conduct school exercises while allowing parents to assess whether the students fully comprehend given subject areas. The method may facilitate student interaction within given subject areas. The method & system may employ artificial intelligence in that it may monitor a student's moral and/or motivation while studying a given a subject. As such. the system may detect a dip in moral by assessing several parameters surrounding the answering of one or more questions. The system may, in turn, seek to increase moral by feeding that student easier questions or questions which are deemed to be of a subject area in which the student is proficient. The system may take countermeasures if a student is demonstrating high proficiency in a subject.
    Type: Application
    Filed: May 28, 2016
    Publication date: November 30, 2017
    Applicant: Pac-Fung Coeus Limited
    Inventor: Wei Tung William TAI
  • Patent number: 9510474
    Abstract: A solid state drive (SSD) assembly and an assembly method for solid state drives, which does not require using screws. The assembly method includes aligning a printed circuit board with a first cover and a second cover, the first cover having pre-installed standoffs on an inner surface thereof. The printed circuit board and the second cover respectively having a first set of through-holes, and the first set of through-holes correspond to the standoffs. The assembly method further includes placing the printed circuit board between the first and second covers, thereby exposing an end portion of each of the standoffs in the through-holes of the second cover, and deforming the end portion of each of the standoffs about the through-holes, thereby fastening the first and second covers with one another.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: November 29, 2016
    Assignee: KINGSTON TECHNOLOGY COMPANY
    Inventors: Peter Leekuo Chou, Stephen Chien, William Tai
  • Publication number: 20150146364
    Abstract: A solid state drive (SSD) assembly and an assembly method for solid state drives, which does not require using screws. The assembly method includes aligning a printed circuit board with a first cover and a second cover, the first cover having pre-installed standoffs on an inner surface thereof. The printed circuit board and the second cover respectively having a first set of through-holes, and the first set of through-holes correspond to the standoffs. The assembly method further includes placing the printed circuit board between the first and second covers, thereby exposing an end portion of each of the standoffs in the through-holes of the second cover, and deforming the end portion of each of the standoffs about the through-holes, thereby fastening the first and second covers with one another.
    Type: Application
    Filed: November 26, 2013
    Publication date: May 28, 2015
    Applicant: KINGSTON TECHNOLOGY CORPORATION
    Inventors: PETER LEEKUO CHOU, STEPHEN CHIEN, WILLIAM TAI
  • Publication number: 20070222859
    Abstract: Aspects of the present invention include method and apparatuses that may utilize a digital video recording device with a screen control panel, for example, a touch screen control panel, to record digital video data with adjusted light compensation based on a selected object within a scene. For example, a user, using a touch screen control panel, may choose an object within a scene. Based on this selection, the digital video recording device may adjust the backlight compensation settings and camera angle to obtain a better image of the selected object. A user may select an object by touching the image of the object, tracing the selected object, or touching a number of reference points of the object. Then, depending on the user selection, the digital video recording device may take a snapshot, zoom in and take a snapshot, record the scene, or it may lock on the object and readjust and track the object as the object moves, while recording the scene.
    Type: Application
    Filed: March 23, 2006
    Publication date: September 27, 2007
    Inventors: Hung Chang, Allan Chen, William Tai
  • Publication number: 20070217761
    Abstract: Aspects of the present invention include method and apparatuses that may be utilized to more efficiently use available storage space for a digital video recording system in a law enforcement vehicle and final “backend storage systems.” In one embodiment of the present invention, video and audio data is recorded in one or more buffers when a triggering event is activated, while a digital video recording device accounts for specified pre-event time, a time period before a first triggering event has been activated, and a post-event time, a time period after a second triggering event has been activated. The system will tag the actual start and stop points of events in one or more buffers based on a first and a second triggering event and will then include the pre-event and post-event data along with specified data. The system will then extract the event from one or more buffer files and write the event into final video files to be stored in a hard disk drive.
    Type: Application
    Filed: March 7, 2006
    Publication date: September 20, 2007
    Inventors: Allan Chen, William Tai, Hung Chang
  • Patent number: 5773889
    Abstract: An interconnect structure for connecting an integrated circuit (IC) chip to a supporting substrate is described. The supporting substrate serves to communicate signals between the IC chip and the "outside world," such as other IC chips. In one embodiment, the interconnect structure comprises an interconnect substrate having a first post disposed on one of its surfaces and a second post disposed on another of its surfaces. One post is for contacting the IC chip and the other is for contacting the major substrate. Each post comprising an elongated body having top and bottom ends, with the bottom end being mounted to one of the substrate surfaces and the top end having a substantially flat surface which is substantially co-planer with the substrate surface. The interconnect substrate further comprises a means for de-concentrating the mechanical stain present at one or both of the top and bottom ends of each post.
    Type: Grant
    Filed: September 23, 1996
    Date of Patent: June 30, 1998
    Assignee: Fujitsu Limited
    Inventors: David George Love, Larry Louis Moresco, William Tai-Hua Chou, David Albert Horine, Connie Mak Wong, Solomon Isaac Beilin
  • Patent number: 5656414
    Abstract: Simple and cost-effective methods for forming tall, high-aspect ratio structures in a material layer comprising a first layer of a image-reversal-type photo-sensitive material and a second layer of a positive-type photo-sensitive material is disclosed. The layers are formed, exposed to actinic radiation, and developed such that the formation, exposure, and development of the second layer does not substantially modify or destroy the patterns formed in the first layer. In one embodiment, the first layer is exposed to actinic radiation through a first mask comprising the complimentary image, or negative, of a desired high-aspect ratio structure. The image in the first layer is then reversed by heating to an elevated temperature and subsequently blank flood exposure of actinic radiation. A second layer of a positive type photo-sensitive material chemically compatible with the IRP layer is then formed over the first layer.
    Type: Grant
    Filed: April 23, 1993
    Date of Patent: August 12, 1997
    Assignee: Fujitsu Limited
    Inventors: William Tai-Hua Chou, Wen-chou Vincent Wang
  • Patent number: 5536362
    Abstract: Methods of constructing a wire interconnect structure on a substrate are described. The methods broadly comprise the steps of depositing a spacer layer on a surface of the substrate, depositing a mask layer on the spacer layer, and removing a first portion of the mask layer overlying a desired area on the substrate surface to expose the spacer layer underlying the first portion of the mask layer. The methods further comprise the step of etching the structure such that a first portion of the spacer layer overlaying the desired area is removed and such that a portion of the desired area is exposed, and the step of depositing a first conductive material on the exposed portion of the desired area such that a conductive post is formed on the substrate surface and mounted to the desired area. Some of the disclosed methods comprise additional steps for forming an interconnect structure on the opposite surface of the substrate and providing an electrical interconnect means between the two interconnect structures.
    Type: Grant
    Filed: February 16, 1994
    Date of Patent: July 16, 1996
    Assignee: Fujitsu Limited
    Inventors: David G. Love, Larry L. Moresco, William Tai-Hua Chou, David A. Horine, Connie M. Wong, Solomon I. Beilin