Abstract: A electromagnetic core and winding assembly is proposed. The assembly may include a core comprising a body and. an aperture defined, by an inner surface of the body. The assembly may also include a plurality of plate windings configured to electromagnetically operate with the core, the plurality of plate windings disposed to cross and at least partially surround the body of the core. A portion of each of the plurality of plate windings may pass through the aperture of the core. The plurality of plate windings may at least partially orthogonally surround the body of the core.

Abstract: A device may include a semiconductor die. A device may include a bottom heat spreader and a top heat spreader, wherein the bottom heat spreader and the top heat spreader are disposed on opposite sides of the semiconductor die, wherein an area of the top heat spreader is greater than an area of the semiconductor die, wherein the top heat spreader extends beyond the semiconductor die, wherein an area of the bottom heat spreader is greater than the area of the semiconductor die, wherein the bottom heat spreader extends beyond the semiconductor die, and wherein a total thickness of the top heat spreader and the bottom heat spreader is at least four times a thickness of the semiconductor die.

Abstract: The present disclosure is directed to a packaged semiconductor component and circuit assembly that includes such a packaged semiconductor component and a capacitor. The packaged semiconductor component includes a semiconductor die that includes a field effect transistor, a side source terminal positioned on a first side of packaged semiconductor component and connected to a source of the field effect transistor, and a drain terminal positioned on a second side of packaged semiconductor component and connected to a drain of the field effect transistor, wherein the first side is adjacent to the second side. The capacitor is electrically connected between the source terminal and the drain terminal.

Abstract: The present disclosure relates to a semiconductor package. The semiconductor package includes a semiconductor die, molding material, and a conductive structure. The conductive structure is at least partly stacked with the semiconductor die, and the conductive structure includes a plurality of slots positioned around a point of the semiconductor die. The plurality of slots is configured to equalize thermal stresses during the operation of the semiconductor die about the point of the semiconductor die, where the thermal stresses are associated with coefficient of thermal expansion mismatches between the conductive structure and the molding material. In addition, at least a portion of the molding material is in contact with the conductive structure.

Abstract: The present disclosure relates to a semiconductor package. The semiconductor package includes a semiconductor die and a plurality of leads. The plurality of leads includes two drain leads connected to the drain, two source leads connected to the source, a gate lead connected to the gate, the gate lead positioned between the two source leads, and a sensing lead positioned between the two source leads. The two source leads, the gate lead, and the sensing lead are positioned on a first side of the semiconductor package that is opposite to a second side of the semiconductor package, and wherein the drain leads are positioned on the second side.

Abstract: The present disclosure relates to a semiconductor package with a pre-formed die clip and lead frame. The semiconductor package includes a semiconductor die, a heat spreader on a first side of the semiconductor die, a lead frame on a second side of the semiconductor die, and a die clip positioned between the semiconductor die and a portion of the lead frame. The die clip and the lead frame are pre-joined by way of various connection points.

Abstract: A device includes an integrated circuit (IC) die, a top-side base plate to which the IC die is mounted, and a body attached to the top-side base plate such that the IC die is inside the body, the body configured for attachment to a printed circuit board (PCB) such that the top-side base plate faces away from the PCB. The device may or may not include legs that abut the PCB upon installation.

Abstract: A device includes an integrated circuit (IC) die, a top-side base plate to which the IC die is mounted, and a body attached to the top-side base plate such that the IC die is inside the body, the body configured for attachment to a printed circuit board (PCB) such that the top-side base plate faces away from the PCB. The device may or may not include legs that abut the PCB upon installation.

Abstract: The bus bar includes a first bus bar layer formed of a first generally uniform thickness of a first bus bar conductor; a first dielectric layer overlying a top surface of the first bus bar layer; and a second bus bar layer formed of a second generally uniform thickness of a second bus bar conductor overlying a top surface of the first dielectric layer and the top surface of the first bus bar layer wherein: the first bus bar layer includes a first via for receipt of a first electrical lead of an electrical component and a second via for receipt of a second electrical lead of the electrical component and wherein: the first dielectric layer and the second bus bar layer each include a via aligned with the first via wherein the first electrical lead is extendable from beneath the first bus bar layer through the first dielectric layer and through the second bus bar layer.

Abstract: The bus bar includes a first bus bar layer formed of a first generally uniform thickness of a first bus bar conductor; a first dielectric layer overlying a top surface of the first bus bar layer; and a second bus bar layer formed of a second generally uniform thickness of a second bus bar conductor overlying a top surface of the first dielectric layer and the top surface of the first bus bar layer wherein: the first bus bar layer includes a first via for receipt of a first electrical lead of an electrical component and a second via for receipt of a second electrical lead of the electrical component and wherein: the first dielectric layer and the second bus bar layer each include a via aligned with the first via wherein the first electrical lead is extendable from beneath the first bus bar layer through the first dielectric layer and through the second bus bar layer.