Patents by Inventor William Tuccio

William Tuccio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11450213
    Abstract: A flight deck system for an aircraft includes a processor, a graphical interface for displaying flight-related information in the form of selectable items, a control interface for receiving a selection of the selectable items, and a non-transitory computer-readable storage medium for storing electronic representations of charts. The selectable items correspond to the electronic representations of charts, and the electronic representations of charts describe minima and associated conditional criteria for operating the aircraft (e.g., proximate to an airport). The processor is configured to arrange the selectable items, receive a selection of the selectable items, identify a corresponding one of the electronic representations of charts, receive a condition associated with the aircraft, compare the condition to the conditional criteria for operating the aircraft to identify an applicable one of the plurality of minima, and display the applicable one of the plurality of minima on the graphical interface.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: September 20, 2022
    Assignee: Garmin International, Inc.
    Inventors: William A. Tuccio, Jason E. Hewes, Tiziano Bernard, Eric W. Sargent, Joseph L. Komer
  • Publication number: 20220215764
    Abstract: A flight deck system for an aircraft includes a processor, a graphical interface for displaying flight-related information in the form of selectable items, a control interface for receiving a selection of the selectable items, and a non-transitory computer-readable storage medium for storing electronic representations of charts. The selectable items correspond to the electronic representations of charts, and the electronic representations of charts describe minima and associated conditional criteria for operating the aircraft (e.g., proximate to an airport). The processor is configured to arrange the selectable items, receive a selection of the selectable items, identify a corresponding one of the electronic representations of charts, receive a condition associated with the aircraft, compare the condition to the conditional criteria for operating the aircraft to identify an applicable one of the plurality of minima, and display the applicable one of the plurality of minima on the graphical interface.
    Type: Application
    Filed: January 4, 2021
    Publication date: July 7, 2022
    Inventors: William A. Tuccio, Jason E. Hewes, Tiziano Bernard, Eric W. Sargent, Joseph L. Komer
  • Publication number: 20220215768
    Abstract: A flight deck system for an aircraft includes a processor, a graphical interface for displaying flight-related information in the form of selectable items, a control interface for receiving a selection of the selectable items, and a non-transitory computer-readable storage medium for storing electronic representations of charts. The selectable items correspond to the electronic representations of charts, and the electronic representations of charts describe circling approaches and associated conditional criteria for operating the aircraft (e.g., proximate to an airport).
    Type: Application
    Filed: January 4, 2021
    Publication date: July 7, 2022
    Inventors: William A. Tuccio, Jason E. Hewes, Tiziano Bernard, Eric W. Sargent, Joseph L. Komer
  • Patent number: 7007194
    Abstract: A system interface includes a plurality of first directors, a plurality of second directors, a data transfer section and a message network. The data transfer section includes a cache memory. The cache memory is coupled to the plurality of first and second directors. The messaging network operates independently of the data transfer section and such network is coupled to the plurality of first directors and the plurality of second directors. The first and second directors control data transfer between the first directors and the second directors in response to messages passing between the first directors and the second directors through the messaging network to facilitate data transfer between first directors and the second directors. The data passes through the cache memory in the data transfer section. A method for operating a data storage system adapted to transfer data between a host computer/server and a bank of disk drives.
    Type: Grant
    Filed: June 29, 2000
    Date of Patent: February 28, 2006
    Assignee: EMC Corporation
    Inventors: Paul C. Wilson, Mark Zani, Farouk Khan, Christopher S. MacLellan, John K. Walton, Steven MacArthur, Kendall A. Chilton, William Tuccio, Robert A. Thibault
  • Patent number: 6289401
    Abstract: A data storage system wherein a host computer is coupled to a bank of disk drives through a system interface. The interface has a memory with a high address memory section and a low address memory section. A plurality of directors control data transfer between the host computer and the bank of disk drives as such datapasses through the memory. A pair of high address busses electrically is connected to the high address memory and a pair of low address busses is electrically connected to the low address memory. Each one of the directors is electrically connected to one of the pair of high address busses and one of the pair of low address busses.
    Type: Grant
    Filed: December 30, 1998
    Date of Patent: September 11, 2001
    Assignee: EMC Corporation
    Inventors: William Tuccio, Christopher Mulvey, Farouk Khan
  • Patent number: 6230217
    Abstract: A data storage system wherein a host computer is coupled to a bank of disk drives through a system interface. The interface has a memory with a high address memory section and a low address memory section. A plurality of directors control data transfer between the host computer and the bank of disk drives as such data passes through the memory. A pair of high address busses electrically is connected to the high address memory and a pair of low address busses is electrically connected to the low address memory. Each one of the directors is electrically connected to one of the pair of high address busses and one of the pair of low address busses. A front-end portion of the directors is electrically connected to the host computer and a rear-end portion of the directors is electrically connected to the bank of disk drives.
    Type: Grant
    Filed: December 30, 1998
    Date of Patent: May 8, 2001
    Assignee: Raytheon Company
    Inventors: William Tuccio, Farouk Khan, Brian Gallagher