Patents by Inventor William Veitschegger

William Veitschegger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10672688
    Abstract: A semiconductor power device including a base plate, a ring frame disposed over the base plate, a semiconductor power die disposed on the base plate and surrounded by the ring frame, an input lead by way the semiconductor power die receives an input signal, wherein the input lead is disposed over a first portion of the ring frame, and an output lead by way an output signal generated by the semiconductor power die is sent to another device, wherein the output lead is disposed over a second portion of the ring frame. The ring frame may be comprised of a relatively high thermal conductivity material, such as beryllium-oxide (Be), silicon-carbide (SiC), diamond, aluminum nitride (AlN), or others. The ring frame produces at least one more heat path between the active region of the semiconductor power die and the base plate so as to reduce the effective thermal impedance.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: June 2, 2020
    Assignee: Integra Technologies, Inc.
    Inventor: William Veitschegger
  • Publication number: 20190355648
    Abstract: A semiconductor power device including a base plate, a ring frame disposed over the base plate, a semiconductor power die disposed on the base plate and surrounded by the ring frame, an input lead by way the semiconductor power die receives an input signal, wherein the input lead is disposed over a first portion of the ring frame, and an output lead by way an output signal generated by the semiconductor power die is sent to another device, wherein the output lead is disposed over a second portion of the ring frame. The ring frame may be comprised of a relatively high thermal conductivity material, such as beryllium-oxide (Be), silicon-carbide (SiC), diamond, aluminum nitride (AlN), or others. The ring frame produces at least one more heat path between the active region of the semiconductor power die and the base plate so as to reduce the effective thermal impedance.
    Type: Application
    Filed: May 18, 2018
    Publication date: November 21, 2019
    Inventor: William Veitschegger
  • Patent number: 10141238
    Abstract: A semiconductor power device including a base plate, a semiconductor power die disposed on the base plate, an input lead by way the semiconductor power die receives an input signal, an output lead by way an output signal generated by the semiconductor power die is sent to another device, and at least one thermal substrate disposed on the base plate adjacent to the semiconductor power die, wherein a set of electrodes of the semiconductor power die are thermally and electrically coupled to a metallization layer on the thermal substrate. The thermal substrate may be comprised of a relatively high thermal conductivity material, such as beryllium-oxide (Be), silicon-carbide (SiC), diamond, aluminum nitride (AlN), or others. The thermal substrate produces at least one more heat path between the active region of the semiconductor power die and the base plate so as to reduce the effective thermal impedance.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: November 27, 2018
    Assignee: Integra Technologies, Inc.
    Inventor: William Veitschegger
  • Patent number: 7400214
    Abstract: A high power, low loss RF strip transmission line coupling structure is provided. It includes a multi-layer printed circuit board (PCB), a top cover and a bottom cover. The top and bottom covers provide the ground reference for the strip transmission line coupling structure. The PCB is fastened to the top and bottom covers and is used for: creating the center conductor of an air dielectric strip transmission line and edge coupler; providing a means to transition from microstrip to air dielectric strip transmission line; supporting the air dielectric strip transmission line; routing of other signals; and passing ground to the top and bottom covers. To create an air dielectric strip transmission line, the PCB material is adequately removed to effectively form a rectangular bar of dielectric and metal layers. This rectangular bar is plated along the edges where the PCB material was removed to ensure that the top and bottom PCB metal layers are at the same potential.
    Type: Grant
    Filed: August 29, 2005
    Date of Patent: July 15, 2008
    Assignee: Powerwave Technologies, Inc.
    Inventors: Joseph Storniolo, Jeremy Monroe, Melanie Daniels, William Veitschegger, Michael Hrybenko, Frank Kimmey
  • Publication number: 20060044075
    Abstract: A high power, low loss RF strip transmission line coupling structure is provided. It includes a multi-layer printed circuit board (PCB), a top cover and a bottom cover. The top and bottom covers provide the ground reference for the strip transmission line coupling structure. The PCB is fastened to the top and bottom covers and is used for: creating the center conductor of an air dielectric strip transmission line and edge coupler; providing a means to transition from microstrip to air dielectric strip transmission line; supporting the air dielectric strip transmission line; routing of other signals; and passing ground to the top and bottom covers. To create an air dielectric strip transmission line, the PCB material is adequately removed to effectively form a rectangular bar of dielectric and metal layers. This rectangular bar is plated along the edges where the PCB material was removed to ensure that the top and bottom PCB metal layers are at the same potential.
    Type: Application
    Filed: August 29, 2005
    Publication date: March 2, 2006
    Inventors: Joseph Storniolo, Jeremy Monroe, Melanie Daniels, William Veitschegger, Michael Hrybenko, Frank Kimmey
  • Publication number: 20060017509
    Abstract: A circuit and method for modulating the gate bias voltage of a FET transistor in an RF amplifier disclosed. This circuit is used to dynamically control the gate bias of the auxiliary transistor in a Doherty amplifier. The gate bias voltage is modulated so that it tracks the input signal amplitude. Dynamically modulating the gate bias of the auxiliary transistor in the Doherty amplifier improves the peak power and linearity, while maintaining good efficiency.
    Type: Application
    Filed: June 14, 2005
    Publication date: January 26, 2006
    Inventor: William Veitschegger