Patents by Inventor William W. Bernoudy

William W. Bernoudy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240118797
    Abstract: A user interface (UI), data structures and algorithms facilitate programming, analyzing, debugging, embedding, and/or modifying problems that are embedded or to be embedded on an analog processor (e.g., quantum processor), increasing computational efficiency and/or accuracy of problem solutions. The UI provides graph representations (e.g., source graph, target graph and correspondence therebetween) with nodes and edges which may map to hardware components (e.g., qubits, couplers) of the analog processor. Characteristics of solutions are advantageously represented spatially associated (e.g., overlaid or nested) with characteristics of a problem. Characteristics (e.g., bias state) may be represented by color, pattern, values, icons. Issues (e.g., broken chains) may be detected and alerts provided.
    Type: Application
    Filed: June 2, 2023
    Publication date: April 11, 2024
    Inventors: Murray C. Thom, Fiona L. Hanington, Alexander Condello, William W. Bernoudy, Melody C. Wong, Aidan P. Roy, Kelly T. R. Boothby, Edward D. Dahl
  • Patent number: 11900216
    Abstract: Systems and methods are described for operating a hybrid computing system using cluster contraction for converting large, dense input to reduced input that can be easily mapped into a quantum processor. The reduced input represents the global structure of the problem. Techniques involve partitioning the input variables into clusters and contracting each cluster. The input variables can be partitioned using an Unweighted Pair Group Method with Arithmetic Mean algorithm. The quantum processor returns samples based on the reduced input and the samples are expanded to correspond to the original input.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: February 13, 2024
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: James A. King, William W. Bernoudy, Kelly T. R. Boothby, Pau Farré Pérez
  • Patent number: 11900264
    Abstract: Hybrid quantum-classical approaches for solving computational problems in which results from a quantum processor are combined with an exact method executed on a classical processor are described. Quantum processors can generate candidate solutions to a combinatorial optimization problem, but since quantum processors can be probabilistic, they are unable to certify that a solution is an optimal solution. A hybrid quantum-classical exact solver addresses this problem by combining outputs from a quantum annealing processor with a classical exact algorithm that is modified to exploit properties of the quantum computation. The exact method executed on a classical processor can be a Branch and Bound algorithm. A Branch and Bound algorithm can be modified to exploit properties of quantum computation including a) the sampling of multiple low-energy solutions by a quantum processor, and b) the embedding of solutions in a regular structure such as a native hardware graph of a quantum processor.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: February 13, 2024
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Catherine McGeoch, William W. Bernoudy
  • Patent number: 11704012
    Abstract: A user interface (UI), data structures and algorithms facilitate programming, analyzing, debugging, embedding, and/or modifying problems that are embedded or to be embedded on an analog processor (e.g., quantum processor), increasing computational efficiency and/or accuracy of problem solutions. The UI provides graph representations (e.g., source graph, target graph and correspondence therebetween) with nodes and edges which may map to hardware components (e.g., qubits, couplers) of the analog processor. Characteristics of solutions are advantageously represented spatially associated (e.g., overlaid or nested) with characteristics of a problem. Characteristics (e.g., bias state) may be represented by color, pattern, values, icons. Issues (e.g., broken chains) may be detected and alerts provided.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: July 18, 2023
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Murray C. Thom, Fiona L. Hanington, Alexander Condello, William W. Bernoudy, Melody C. Wong, Aidan P. Roy, Kelly T. R. Boothby, Edward D. Dahl
  • Publication number: 20230169378
    Abstract: Systems and methods are described for operating a hybrid computing system using cluster contraction for converting large, dense input to reduced input that can be easily mapped into a quantum processor. The reduced input represents the global structure of the problem. Techniques involve partitioning the input variables into clusters and contracting each cluster. The input variables can be partitioned using an Unweighted Pair Group Method with Arithmetic Mean algorithm. The quantum processor returns samples based on the reduced input and the samples are expanded to correspond to the original input.
    Type: Application
    Filed: November 16, 2022
    Publication date: June 1, 2023
    Inventors: James A. King, William W. Bernoudy, Kelly T. R. Boothby, Pau Farré Pérez
  • Patent number: 11593695
    Abstract: A hybrid computing system for solving a computational problem includes a digital processor, a quantum processor having qubits and coupling devices that together define a working graph of the quantum processor, and at least one nontransitory processor-readable medium communicatively coupleable to the digital processor which stores at least one of processor-executable instructions or data. The digital processor receives a computational problem, and programs the quantum processor with a first set of bias fields and a first set of coupling strengths. The quantum processor generates samples as potential solutions to an approximation of the problem. The digital processor updates the approximation by determining a second set of bias fields based at least in part on the first set of bias fields and a first set of mean fields that are based at least in part on the first set of samples and coupling strengths of one or more virtual coupling devices.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: February 28, 2023
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: William W. Bernoudy, Mohammad H. Amin, James A. King, Jeremy P. Hilton, Richard G. Harris, Andrew J. Berkley, Kelly T. R. Boothby
  • Publication number: 20230042979
    Abstract: Methods for solving discrete quadratic models are described. The methods compute an energy of each state of each variable based on its interaction with other variables, exponential weights, and normalized probabilities proportional to the exponential weights. The energy of each variable is computed as a function of the magnitude of each variable and a current state of all other variables, exponential weights, the feasible region for each variable, and normalized probabilities, proportional to the exponential weights and respecting constraints. Methods executed via a hybrid computing system obtain two candidate values for each variable; constructs a Hamiltonian that uses a binary value to determine which candidate values each variable should take, then constructs a binary quadratic model based on the Hamiltonian. Samples from the binary quadratic model are obtained via a quantum processor.
    Type: Application
    Filed: December 14, 2020
    Publication date: February 9, 2023
    Inventors: Hossein Sadeghi Esfahani, William W. Bernoudy, Mohsen Rahmani
  • Patent number: 11567779
    Abstract: A highly parallelized parallel tempering technique for simulating dynamic systems, such as quantum processors, is provided. Replica exchange is facilitated by synchronizing grid-level memory. Particular implementations for simulating quantum processors by representing cells of qubits and couplers in grid-, block-, and thread-level memory are discussed. Parallel tempering of such dynamic systems can be assisted by modifying replicas based on isoenergetic cluster moves (ICMs). ICMs are generated via secondary replicas which are maintained alongside primary replicas and exchanged between blocks and/or generated dynamically by blocks without necessarily being exchanged. Certain refinements, such as exchanging energies and temperatures through grid-level memory, are also discussed.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: January 31, 2023
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: William W. Bernoudy, James A. King, Andrew D. King
  • Patent number: 11537926
    Abstract: Systems and methods are described for operating a hybrid computing system using cluster contraction for converting large, dense input to reduced input that can be easily mapped into a quantum processor. The reduced input represents the global structure of the problem. Techniques involve partitioning the input variables into clusters and contracting each cluster. The input variables can be partitioned using an Unweighted Pair Group Method with Arithmetic Mean algorithm. The quantum processor returns samples based on the reduced input and the samples are expanded to correspond to the original input.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: December 27, 2022
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: James A. King, William W. Bernoudy, Kelly T. R. Boothby, Pau Farré Pérez
  • Publication number: 20220391081
    Abstract: A user interface (UI), data structures and algorithms facilitate programming, analyzing, debugging, embedding, and/or modifying problems that are embedded or to be embedded on an analog processor (e.g., quantum processor), increasing computational efficiency and/or accuracy of problem solutions. The UI provides graph representations (e.g., source graph, target graph and correspondence therebetween) with nodes and edges which may map to hardware components (e.g., qubits, couplers) of the analog processor. Characteristics of solutions are advantageously represented spatially associated (e.g., overlaid or nested) with characteristics of a problem. Characteristics (e.g., bias state) may be represented by color, pattern, values, icons. Issues (e.g., broken chains) may be detected and alerts provided.
    Type: Application
    Filed: June 30, 2022
    Publication date: December 8, 2022
    Inventors: Murray C. Thom, Fiona L. Hanington, Alexander Condello, William W. Bernoudy, Melody C. Wong, Aidan P. Roy, Kelly T. R. Boothby, Edward D. Dahl
  • Patent number: 11409426
    Abstract: A user interface (UI), data structures and algorithms facilitate programming, analyzing, debugging, embedding, and/or modifying problems that are embedded or to be embedded on an analog processor (e.g., quantum processor), increasing computational efficiency and/or accuracy of problem solutions. The UI provides graph representations (e.g., source graph, target graph and correspondence therebetween) with nodes and edges which may map to hardware components (e.g., qubits, couplers) of the analog processor. Characteristics of solutions are advantageously represented spatially associated (e.g., overlaid or nested) with characteristics of a problem. Characteristics (e.g., bias state) may be represented by color, pattern, values, icons. Issues (e.g., broken chains) may be detected and alerts provided.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: August 9, 2022
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Murray C. Thom, Fiona L. Hanington, Alexander Condello, William W. Bernoudy, Melody C. Wong, Aidan P. Roy, Kelly T. R. Boothby, Edward D. Dahl
  • Publication number: 20210263643
    Abstract: A user interface (UI), data structures and algorithms facilitate programming, analyzing, debugging, embedding, and/or modifying problems that are embedded or to be embedded on an analog processor (e.g., quantum processor), increasing computational efficiency and/or accuracy of problem solutions. The UI provides graph representations (e.g., source graph, target graph and correspondence therebetween) with nodes and edges which may map to hardware components (e.g., qubits, couplers) of the analog processor. Characteristics of solutions are advantageously represented spatially associated (e.g., overlaid or nested) with characteristics of a problem. Characteristics (e.g., bias state) may be represented by color, pattern, values, icons. Issues (e.g., broken chains) may be detected and alerts provided.
    Type: Application
    Filed: February 23, 2021
    Publication date: August 26, 2021
    Inventors: Murray C. Thom, Fiona L. Hanington, Alexander Condello, William W. Bernoudy, Melody C. Wong, Aidan P. Roy, Kelly T. R. Boothby, Edward D. Dahl
  • Publication number: 20200311591
    Abstract: A hybrid computing system for solving a computational problem includes a digital processor, a quantum processor having qubits and coupling devices that together define a working graph of the quantum processor, and at least one nontransitory processor-readable medium communicatively coupleable to the digital processor which stores at least one of processor-executable instructions or data. The digital processor receives a computational problem, and programs the quantum processor with a first set of bias fields and a first set of coupling strengths. The quantum processor generates samples as potential solutions to an approximation of the problem. The digital processor updates the approximation by determining a second set of bias fields based at least in part on the first set of bias fields and a first set of mean fields that are based at least in part on the first set of samples and coupling strengths of one or more virtual coupling devices.
    Type: Application
    Filed: March 26, 2020
    Publication date: October 1, 2020
    Inventors: William W. Bernoudy, Mohammad H. Amin, James A. King, Jeremy P. Hilton, Richard G. Harris, Andrew J. Berkley, Kelly T. R. Boothby
  • Publication number: 20200293331
    Abstract: A highly parallelized parallel tempering technique for simulating dynamic systems, such as quantum processors, is provided. Replica exchange is facilitated by synchronizing grid-level memory. Particular implementations for simulating quantum processors by representing cells of qubits and couplers in grid-, block-, and thread-level memory are discussed. Parallel tempering of such dynamic systems can be assisted by modifying replicas based on isoenergetic cluster moves (ICMs). ICMs are generated via secondary replicas which are maintained alongside primary replicas and exchanged between blocks and/or generated dynamically by blocks without necessarily being exchanged. Certain refinements, such as exchanging energies and temperatures through grid-level memory, are also discussed.
    Type: Application
    Filed: March 12, 2020
    Publication date: September 17, 2020
    Inventors: William W. Bernoudy, James A. King, Andrew D. King
  • Publication number: 20200257987
    Abstract: Hybrid quantum-classical approaches for solving computational problems in which results from a quantum processor are combined with an exact method executed on a classical processor are described. Quantum processors can generate candidate solutions to a combinatorial optimization problem, but since quantum processors can be probabilistic, they are unable to certify that a solution is an optimal solution. A hybrid quantum-classical exact solver addresses this problem by combining outputs from a quantum annealing processor with a classical exact algorithm that is modified to exploit properties of the quantum computation. The exact method executed on a classical processor can be a Branch and Bound algorithm. A Branch and Bound algorithm can be modified to exploit properties of quantum computation including a) the sampling of multiple low-energy solutions by a quantum processor, and b) the embedding of solutions in a regular structure such as a native hardware graph of a quantum processor.
    Type: Application
    Filed: February 7, 2020
    Publication date: August 13, 2020
    Inventors: Catherine McGeoch, William W. Bernoudy
  • Publication number: 20200234172
    Abstract: Systems and methods are described for operating a hybrid computing system using cluster contraction for converting large, dense input to reduced input that can be easily mapped into a quantum processor. The reduced input represents the global structure of the problem. Techniques involve partitioning the input variables into clusters and contracting each cluster. The input variables can be partitioned using an Unweighted Pair Group Method with Arithmetic Mean algorithm. The quantum processor returns samples based on the reduced input and the samples are expanded to correspond to the original input.
    Type: Application
    Filed: January 13, 2020
    Publication date: July 23, 2020
    Inventors: James A. King, William W. Bernoudy, Kelly T. R. Boothby, Pau Farré Pérez