Patents by Inventor William Waters

William Waters has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170048101
    Abstract: The embodiments herein relate to a method in a first unit for determining location of deteriorating hardware. The first unit obtains information indicating a first signal level of a first signal and a second signal level of a second signal transmitted over a wired communication link and over a period of time. The first unit monitors the first signal level and the second signal level over the period of time. When a deviation in the monitored signal levels has been detected, the first unit determines a location of the deteriorating hardware by comparing the deviation in monitored signal levels to known signal deviations for various locations of the deteriorating hardware. The location is in at least one of the wired communication link, the second unit and the third unit.
    Type: Application
    Filed: April 30, 2014
    Publication date: February 16, 2017
    Inventors: Karl-Magnus Möller, Hans Mattsson, Gerry Björkman, William Waters, Erik Sigvardson
  • Patent number: 8674218
    Abstract: A system is employed to mount an electronic component on a shelf. A first restraining device is associated with a support structure in a first location. The first restraining device is configured to operably engage a mating piece associated with the electronic component. The support structure is configured to guide an electronic component along an axis of insertion when introduced to the shelf. A second restraining device is associated with the support structure in a second location. The second restraining device is configured to secure the electronic component via one or more fastening elements.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: March 18, 2014
    Assignee: General Electric Company
    Inventors: Kristopher John Frutschy, William Waters, Keven Peat, Stephen Brooker
  • Patent number: 8665591
    Abstract: A system for an electronic device includes a housing having one or more walls that define an internal region. An outlet port is fluidically coupled to the internal region of the housing, which allows emission of a fluid from the internal region of the housing as a first flow at a first temperature. A merging element, fluidically coupled to the outlet port, merges the first flow with a second flow, which has a second temperature that is less than the first temperature.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: March 4, 2014
    Assignee: General Electric Company
    Inventors: Richard Bourgeois, Kristopher Frutschy, Mohamed Sakami, William Waters, Mao Leng
  • Publication number: 20130071705
    Abstract: Manufacturable and serviceable packaging configurations for multi-cell array batteries. A cell alignment structure is provided for positioning and securing an array of electrochemical cells. An inner battery packaging assembly is also provided having the cell alignment structure, a base plate configured to be disposed below the cell alignment structure, and a removable cover configured to fit over the cell alignment structure and attach to the base plate. Furthermore, an outer battery packaging assembly is provided having the inner battery packaging assembly, an outer support plate configured to be disposed below the inner battery packaging assembly, a removable thermal insulating material surrounding the inner battery packaging assembly, and a removable outer battery cover configured to fit over the inner battery packaging and over the surrounding thermal insulating material and attach to the outer support plate.
    Type: Application
    Filed: September 16, 2011
    Publication date: March 21, 2013
    Applicant: General Electric Company
    Inventors: Kristopher John Frutschy, Kanthilatha Bhamidipati, David T. VanDerwerker, William Waters, Roger Neil Bull, Neil Anthony Johnson, Owen Scott Quirion, John Raymond Krahn, Kashyap Shah, Preston J. McCreary, William Schank
  • Publication number: 20120152586
    Abstract: A system is employed to mount an electronic component on a shelf. A first restraining device is associated with a support structure in a first location. The first restraining device is configured to operably engage a mating piece associated with the electronic component. The support structure is configured to guide an electronic component along an axis of insertion when introduced to the shelf. A second restraining device is associated with the support structure in a second location. The second restraining device is configured to secure the electronic component via one or more fastening elements.
    Type: Application
    Filed: December 15, 2010
    Publication date: June 21, 2012
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Kristopher John Frutschy, William Waters, Keven Peat, Stephen Brooker
  • Publication number: 20120155025
    Abstract: A system for an electronic device includes a housing having one or more walls that define an internal region. An outlet port is fluidically coupled to the internal region of the housing, which allows emission of a fluid from the internal region of the housing as a first flow at a first temperature. A merging element, fluidically coupled to the outlet port, merges the first flow with a second flow, which has a second temperature that is less than the first temperature.
    Type: Application
    Filed: December 21, 2010
    Publication date: June 21, 2012
    Applicant: General Electric Company
    Inventors: Richard Bourgeois, Kristopher Frutschy, Mohamed Sakami, William Waters, Mao Leng
  • Patent number: 5631571
    Abstract: A system for functionally testing opto-electronic devices, such as fiber-optic infrared receiver photodiodes, in the integral wafer or other optical port-exposed status. The testing arrangement uses a portable optical probe for communicating optical signals between the testing apparatus and the tested device in coincidence with electrical energization and functional operation of the electro-optical device by the test apparatus. The optical probe signals may be correlated in time relationship or other manner with the electrical signals applied-to the device-under-test. The invention provides simple conversion between a conventional electrical semiconductor device probe station and an electro-optical device probe station.
    Type: Grant
    Filed: April 3, 1996
    Date of Patent: May 20, 1997
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Stephen Spaziani, Kenneth Vaccaro, William Waters
  • Patent number: 5608255
    Abstract: A photo FET device having a large area backside optical energy reception surface is disclosed. The photo FET device is fabricated in the source gate and drain upward configuration using a lattice determining surrogate substrate and a mesa-forming deep etch processing sequence and then inverted onto a new permanent substrate member and the surrogate substrate member removed in order to expose the active area backside optical energy reception surface. Fabrication of the device from two possible indium-inclusive semiconductor materials and a particular gate metal alloy is also disclosed.
    Type: Grant
    Filed: May 17, 1995
    Date of Patent: March 4, 1997
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Eric A. Martin, Kenneth Vaccaro, William Waters, Joseph P. Lorenzo, Stephen Spaziani
  • Patent number: 5532173
    Abstract: A photo FET device having a large area backside optical energy reception surface is disclosed. The photo FET device is fabricated in the source gate and drain upward configuration using a lattice determining surrogate substrate and a mesa-forming deep etch processing sequence and then inverted onto a new permanent substrate member and the surrogate substrate member removed in order to expose the active area backside optical energy reception surface. Fabrication of the device from two possible indium-inclusive semiconductor materials and a particular gate metal alloy is also disclosed.
    Type: Grant
    Filed: July 14, 1994
    Date of Patent: July 2, 1996
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Eric A. Martin, Kenneth Vaccaro, William Waters, Joseph P. Lorenzo, Stephen Spaziani