Abstract: The invention provides methods and systems for laser assisted wirebonding. One or more conditioning laser pulses are used to prepare a bonding surface for wirebonding by removing impurities such as residues from manufacturing processes, oxides, or irregularities on the bonding surface. Subsequently, a free air ball is brought into contact with the conditioned bonding surface to form a weld.

Abstract: The invention provides methods and systems for laser assisted wirebonding. One or more conditioning laser pulses are used to prepare a bonding surface for wirebonding by removing impurities such as residues from manufacturing processes, oxides, or irregularities on the bonding surface. Subsequently, a free air ball is brought into contact with the conditioned bonding surface to form a weld.

Abstract: The invention provides methods and systems for laser assisted wirebonding. One or more conditioning laser pulses are used to prepare a bonding surface for wirebonding by removing impurities such as residues from manufacturing processes, oxides, or irregularities on the bonding surface. Subsequently, a free air ball is brought into contact with the conditioned bonding surface to form a weld.

Abstract: A semiconductor assembly comprising an integrated circuit chip with a first plurality of metallic contact pads exposed, having a pitch center-to-center of less than 180 ?m. A metallic bump of reflowable metal is attached to each of these contact pads. The assembly further has an electrically insulating substrate with a second plurality of metallic terminal pads in locations matching the locations of the contact pads. Each of the bumps also attached to these matching terminal pads, respectively, whereby the chip is interconnected with the substrate spaced apart by a gap. An adherent polymeric encapsulant fills the gap so that the encapsulant is free of voids. It is a pivotal feature in the method that vibration energy, up to ultrasonic frequencies, is used while the encapsulant is still in a low-viscosity precursor state in order to ensure the void-free spreading of the precursor throughout the gap between chip and substrate.

Abstract: A robust, reliable and low-cost metal structure and process enabling electrical wire/ribbon connections to the interconnecting copper metallization of integrated circuits. The structure comprises a layer of barrier metal that resists copper diffusion, deposited on the non-oxidized copper surface in a thickness such that the barrier layer reduces the diffusion of copper at 250° C. by more than 80% compared with the absence of the barrier metal. The structure further comprises an outermost bondable layer which reduces the diffusion of the barrier metal at 250° C. by more than 80% compared with the absence of the bondable metal. Finally, a metal wire is bonded to the outermost layer for metallurgical connection. The barrier metal is selected from a group consisting of nickel, cobalt, chromium, molybdenum, titanium, tungsten, and alloys thereof. The outermost bondable metal layer is selected from a group consisting of gold, platinum, and silver.

Abstract: A semiconductor assembly comprising an integrated circuit chip with a first plurality of metallic contact pads exposed, having a pitch center-to-center of less than 180 &mgr;m. A metallic bump of reflowable metal is attached to each of these contact pads. The assembly further has an electrically insulating substrate with a second plurality of metallic terminal pads in locations matching the locations of the contact pads. Each of the bumps also attached to these matching terminal pads, respectively, whereby the chip is interconnected with the substrate spaced apart by a gap. An adherent polymeric encapsulant fills the gap so that the encapsulant is free of voids.

Abstract: A robust, reliable and low-cost metal structure and process enabling electrical wire/ribbon connections to the interconnecting copper metallization of integrated circuits. The structure comprises a layer of barrier metal that resists copper diffusion, deposited on the non-oxidized copper surface in a thickness such that the barrier layer reduces the diffusion of copper at 250° C. by more than 80% compared with the absence of the barrier metal. The structure further comprises an outermost bondable layer which reduces the diffusion of the barrier metal at 250° C. by more than 80% compared with the absence of the bondable metal. Finally, a metal wire is bonded to the outermost layer for metallurgical connection.

Abstract: A method of bonding wire between at least one pair of bond locations in a semiconductor device and the bonder. A conveyor is provided having a conveying surface for conveying in a predetermined direction a partially fabricated semiconductor device having first and second bonding locations. A first capillary is provided for forming a stitch bond to the first bonding location, the first capillary being disposed at an angle of about 45 degrees with respect to the predetermined direction and a line normal thereto and substantially parallel to the plane of the conveying surface. A stitch bond is formed on the first bonding location with the first capillary. The first capillary is at an angle of substantially 45 degrees with respect to a line normal to the plane of the conveying surface.

Abstract: A method of bonding wire and the bonder which includes providing a wire bonder for bonding wire to a bonding location. The wire bonder has a first bonding head designed to form a stitch bond while travelling in a first predetermined direction, the first bonding head having a first major axis and a first minor axis normal to the first major axis, the first major axis being at an angle of from about 45 degrees to a finite angle greater than zero relative to the first predetermined direction and a second bonding head designed to form a stitch bond while travelling in a second predetermined direction, the second bonding head having a second major axis and a second minor axis normal to the second major axis, the second major axis being at an angle of from about 45 degrees to a finite angle greater than zero relative to the second predetermined direction. An area having bonding locations to which the bonder is to make wire bonds is divided into a plurality of regions.

Abstract: A method of bonding wire between at least one pair of bond locations in a semiconductor device and the bonder. A conveyor is provided having a conveying surface for conveying in a predetermined direction a partially fabricated semiconductor device having first and second bonding locations. A first capillary is provided for forming a stitch bond to the first bonding location, the first capillary being disposed at an angle of about 45 degrees with respect to the predetermined direction and a line normal thereto and substantially parallel to the plane of the conveying surface. A stitch bond is formed on the first bonding location with the first capillary. The first capillary is at an angle of substantially 45 degrees with respect to a line normal to the plane of the conveying surface.

Abstract: A method of bonding wire and the bonder which includes providing a wire bonder for bonding wire to a bonding location. The wire bonder has a first bonding head designed to form a stitch bond while travelling in a first predetermined direction, the first bonding head having a first major axis and a first minor axis normal to the first major axis, the first major axis being at an angle of from about 45 degrees to a finite angle greater than zero relative to the first predetermined direction and a second bonding head designed to form a stitch bond while travelling in a second predetermined direction, the second bonding head having a second major axis and a second minor axis normal to the second major axis, the second major axis being at an angle of from about 45 degrees to a finite angle greater than zero relative to the second predetermined direction. An area having bonding locations to which the bonder is to make wire bonds is divided into a plurality of regions.