Patents by Inventor Wilson Fai Chin

Wilson Fai Chin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for dummy cell placement management
    Patent number: 9330224
    Abstract: A method for manipulating a circuit design includes receiving multiple dummy cell modification parameters, selecting, by a computer processor and based on the dummy cell modification parameters, a dummy cell insertion region on a circuit design, and generating, in the dummy cell insertion region, multiple dummy cells. The method further includes selecting a first dummy cell from the dummy cells, determining, by the computer processor and based on a location of the first dummy cell, an illegal overlap with the first dummy cell, and removing, by the computer processor and from the dummy cells, the first dummy cell. The method further includes inserting, by the computer processor, on the circuit design, and after removing the first dummy cell, the dummy cells to obtain a modified circuit design, and presenting the modified circuit design.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: May 3, 2016
    Assignee: Oracle International Corporation
    Inventors: Duo Ding, Srinivas Sanivarapu, Lai-ching Lydia So, Joseph Curt Peters, Carl Alfred Shisler, Gary Lynn Fowler, Thuvan Le, Kaiwha Peng, Tao Hou, Wilson Fai Chin
  • METHOD AND APPARATUS FOR DUMMY CELL PLACEMENT MANAGEMENT
    Publication number: 20150317425
    Abstract: A method for manipulating a circuit design includes receiving multiple dummy cell modification parameters, selecting, by a computer processor and based on the dummy cell modification parameters, a dummy cell insertion region on a circuit design, and generating, in the dummy cell insertion region, multiple dummy cells. The method further includes selecting a first dummy cell from the dummy cells, determining, by the computer processor and based on a location of the first dummy cell, an illegal overlap with the first dummy cell, and removing, by the computer processor and from the dummy cells, the first dummy cell. The method further includes inserting, by the computer processor, on the circuit design, and after removing the first dummy cell, the dummy cells to obtain a modified circuit design, and presenting the modified circuit design.
    Type: Application
    Filed: April 30, 2014
    Publication date: November 5, 2015
    Applicant: Oracle International Corporation
    Inventors: Duo Ding, Srinivas Sanivarapu, Lai-ching Lydia So, Joseph Curt Peters, Carl Alfred Shisler, Gary Lynn Fowler, Thuvan Le, Kaiwha Peng, Tao Hou, Wilson Fai Chin
  • MEMORY WITH ACTIVE MODE BACK-BIAS VOLTAGE CONTROL AND METHOD OF OPERATING SAME
    Publication number: 20090213641
    Abstract: Data storage cells of a static random access memory array are selectively provided with back-bias voltages to reduce current leakage during an active mode of operation. Circuitry electrically connected with the array receives control signals and provides the back-bias voltages to certain idle data storage cells of the array based on the control signals.
    Type: Application
    Filed: February 22, 2008
    Publication date: August 27, 2009
    Inventors: Heechoul Park, Song Chin Kim, Lancelot Y. Kwong, Wilson Fai Chin