Abstract: This invention concerns the fabrication of nano to atomic scale devices, that is electronic devices fabricated down to atomic accuracy. The fabrication process uses either an SEM or a STM tip to pattern regions on a semiconductor substrate. Then, forming electrically active parts of the device at those regions. Encapsulating the formed device. Using a SEM or optical microscope to align locations for electrically conducting elements on the surface of the encapsulating semiconductor with respective active parts of the device encapsulated below the surface. Forming electrically conducting elements on the surface at the aligned locations. And, electrically connecting electrically conducting elements on the surface with aligned parts of the device encapsulated below the surface to allow electrical connectivity and tunability of the device. In further aspects the invention concerns the devices themselves.

Abstract: This invention concerns the fabrication of nano to atomic scale devices, that is electronic devices fabricated down to atomic accuracy. The fabrication process uses either an SEM or a STM tip to pattern regions on a semiconductor substrate. Then, forming electrically active parts of the device at those regions. Encapsulating the formed device. Using a SEM or optical microscope to align locations for electrically conducting elements on the surface of the encapsulating semiconductor with respective active parts of the device encapsulated below the surface. Forming electrically conducting elements on the surface at the aligned locations. And, electrically connecting electrically conducting elements on the surface with aligned parts of the device encapsulated below the surface to allow electrical connectivity and tunability of the device. In further aspects the invention concerns the devices themselves.