Abstract: A test driver for connecting a controlling computer to an IC chip having a standard test access port (TAP) is both hardware and software efficient. The last stage of a wrap-around or circulating control register feeds a test mode select (TMS) pin of the TAP, and feeds the next-to-the-last stage back to the first stage. As a result of the control register configuration, the control register's original contents are automatically restored after each shift, cycle, thus abrogating the need to reload the control register if the same control pattern is again needed, and abrogating the need to maintain (via software) the correct value on the TMS pin in between shifting sequences of the control register. Proper shift times in a data register of the test driver are achieved by replicating the IC chip TAP controller state machine.