Patents by Inventor Winand Van Sloten
Winand Van Sloten has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11637490Abstract: In some examples, a device for controlling a transistor in a power converter system includes a first circuit configured to generate an error current based on a difference between a reference signal and a feedback signal, where the feedback signal depends on an output voltage of the power converter system. The device also includes a frequency generator configured to generate an activation signal based on the difference between the reference signal and the feedback signal. The device further includes a pedestal circuit configured to define a peak current threshold for the transistor based on an offset value. The device also includes a logic circuit configured to activate the transistor based on the activation signal and deactivate the transistor when a current sense signal reaches the defined peak current threshold, where the current sense signal is representative of a power current conducted by the transistor.Type: GrantFiled: June 21, 2021Date of Patent: April 25, 2023Assignee: Infineon Technologies AGInventors: Marco Flaibani, Davide Dal Bianco, Giuseppe Loccia, Tommaso Pieretti, Winand Van Sloten
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Patent number: 11569728Abstract: A circuit for controlling a switch of a power converter includes a first clock signal generator configured to generate a first clock signal and a switching signal generator configured to generate a switching signal to control the switch of the power converter based on the first clock signal. The circuit further includes error detection circuitry configured to output an error indication and a second clock signal generator configured to generate, in response to the error indication, a second clock signal that comprises an edge of a clock cycle of the second clock signal that corresponds to when the switching signal deactivates the switch of the power converter plus a time delay. The switching signal generator is configured to generate the switching signal to control the switch of the power converter further based on the second clock signal in response to the error indication being output by the error detection circuitry.Type: GrantFiled: November 29, 2021Date of Patent: January 31, 2023Assignee: Infineon Technologies AGInventors: Winand Van Sloten, Filippo Boera
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Publication number: 20220407417Abstract: In some examples, a device for controlling a transistor in a power converter system includes a first circuit configured to generate an error current based on a difference between a reference signal and a feedback signal, where the feedback signal depends on an output voltage of the power converter system. The device also includes a frequency generator configured to generate an activation signal based on the difference between the reference signal and the feedback signal. The device further includes a pedestal circuit configured to define a peak current threshold for the transistor based on an offset value. The device also includes a logic circuit configured to activate the transistor based on the activation signal and deactivate the transistor when a current sense signal reaches the defined peak current threshold, where the current sense signal is representative of a power current conducted by the transistor.Type: ApplicationFiled: June 21, 2021Publication date: December 22, 2022Inventors: Marco Flaibani, Davide Dal Bianco, Giuseppe Loccia, Tommaso Pieretti, Winand Van Sloten
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Patent number: 10666142Abstract: In accordance with one embodiment, a switching converter includes a switching circuit configured to receive a switching signal and to alternatingly connect an output node of the switching circuit with a supply node and a reference node in accordance with the switching signal. An input voltage is operably applied between the supply node and the reference node. The switching converter further includes an inductor coupled between the output node of the switching circuit and an output node of the switching converter as well as an oscillator configured to generate a clock signal with an oscillator frequency depending on the input voltage. A switching controller is configured to receive the clock signal and to generate the switching signal using pulse-width modulation (PWM), wherein the frequency of the switching signal is set in accordance with the oscillator frequency and a duty cycle of the switching signal is deter-mined using current-mode control.Type: GrantFiled: November 15, 2018Date of Patent: May 26, 2020Assignee: Infineon Technologies AGInventors: Marco Vanin, Cristian Garbossa, Stefano Orlandi, Winand Van Sloten
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Publication number: 20190157975Abstract: In accordance with one embodiment, a switching converter includes a switching circuit configured to receive a switching signal and to alternatingly connect an output node of the switching circuit with a supply node and a reference node in accordance with the switching signal. An input voltage is operably applied between the supply node and the reference node. The switching converter further includes an inductor coupled between the output node of the switching circuit and an output node of the switching converter as well as an oscillator configured to generate a clock signal with an oscillator frequency depending on the input voltage. A switching controller is configured to receive the clock signal and to generate the switching signal using pulse-width modulation (PWM), wherein the frequency of the switching signal is set in accordance with the oscillator frequency and a duty cycle of the switching signal is deter-mined using current-mode control.Type: ApplicationFiled: November 15, 2018Publication date: May 23, 2019Inventors: Marco Vanin, Cristian Garbossa, Stefano Orlandi, Winand Van Sloten
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Patent number: 8085033Abstract: A phase detection system (100) comprises an input terminal (101), first and second peak detectors (103, 113), an averaging unit (107), an offset unit (122), and a comparator (126). Input terminal (101) is coupled to the first and to the second peak detectors (103, 113) and provides an input signal to phase detection system (100). Averaging unit (107) is coupled between offset unit (122) and both the first peak detector and the second peak detector (103, 113), and generates an intermediate signal. Offset unit (122) is coupled to input terminal (101) and generates two comparable signals by applying a predetermined offset in signal strength to the input signal or the intermediate signal. The comparator (126) is coupled to the offset unit (122) and generates an output signal by comparing the two comparable signals which is indicative of the phase of the input signal.Type: GrantFiled: August 31, 2006Date of Patent: December 27, 2011Assignee: NXP B.V.Inventors: Jacobus Adrianus Van Oevelen, Winand Van Sloten, Thomas Stork, Michael Hinz
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Publication number: 20090212762Abstract: A phase detection system (100) comprises an input terminal (101), first and second peak detectors (103, 113), an averaging unit (107), an offset unit (122), and a comparator (126). Input terminal (101) is coupled to the first and to the second peak detectors (103, 113) and provides an input signal to phase detection system (100). Averaging unit (107) is coupled between offset unit (122) and both the first peak detector and the second peak detector (103, 113), and generates an intermediate signal. Offset unit (122) is coupled to input terminal (101) and generates two comparable signals by applying a predetermined offset in signal strength to the input signal or the intermediate signal. The comparator (126) is coupled to the offset unit (122) and generates an output signal by comparing the two comparable signals which is indicative of the phase of the input signal.Type: ApplicationFiled: August 31, 2006Publication date: August 27, 2009Applicant: NXP B.V.Inventors: Jacobus Adrianus Van Oevelen, Winand Van Sloten, Thomas Stork, Michael Hinz