Abstract: The invention relates to a address calculation unit (15) for region based image processing tasks, where a processing unit (15) processes the data and exchanges the processed data between a global memory (11) and a local memory (12), wherein the address calculation of region-based algorithms is performed by the address calculation unit in parallel to the date processing of the and the actual processing of data.

Abstract: A two-dimensional data memory (1) comprising memory elements which are arranged in rows and columns, which are designed to store in each case one data word, which in the row direction and in the column direction are coupled locally to their respectively adjacent memory elements such that with each control pulse of a row control signal the data words of the memory elements of all rows are shifted in a shift direction into the memory elements of the respectively adjacent row, with the data words of the last row being shifted into the first row, and such that with each control pulse of a column control signal the data words of the memory elements of all columns are shifted in a shift direction into the memory elements of the respectively adjacent column, with the data words of the last column being shifted into the first column, and which are designed such that an external write access is possible only in respect of at least one predefined row and at least one predefined column and such that an external read acc

Abstract: The invention relates to a two-dimensional data memory (1) comprising memory elements which are arranged in rows and columns, which are designed to store in each case one data word, which in the row direction and in the column direction are coupled locally to their respectively adjacent memory elements such that with each control pulse of a row control signal the data words of the memory elements of all rows are shifted in a shift direction into the memory elements of the respectively adjacent row, with the data words of the last row being shifted into the first row, and such that with each control pulse of a column control signal the data words of the memory elements of all columns are shifted in a shift direction into the memory elements of the respectively adjacent column, with the data words of the last column being shifted into the first column, and which are designed such that an external write access is possible only in respect of at least one predefined row and at least one predefined column and such

Abstract: In a filter arrangement for filtering digital data comprising synchronizing information, in which the arrangement operates in a system clock, an orderly data transfer for a rapid synchronization after disturbance of the data is ensured in that the arrangement comprises a first filter (1) and a second, succeeding filter (2) which supplies the output signal of the arrangement, in that the first filter (1) receives at least the synchronizing information comprised in the data and the second filter (2) receives the output signal of the first filter (1) as well as the digital data, in that the first filter (1) searches synchronizing information in a cyclically repeating process, passes on this information to its output, subsequently blocks all possibly occurring synchronizing information during a predetermined number of system clock pulses, and, after finishing the predetermined number of system clocks, again searches and passes on the next synchronizing information, and in that the second filter (2) takes over a p