Patents by Inventor Wing Him Lau
Wing Him Lau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9520306Abstract: A process for fabricating an integrated circuit package includes selectively etching a leadframe strip to define a die attach pad and a plurality of contact pads. At least one side of the die attach pad has a plurality of spaced apart pad portions. A semiconductor die is mounted to the die attach pad and wires are bonded from the semiconductor die to respective ones of the contact pads. A first surface of the leadframe strip, including the semiconductor die and wire bonds, is encapsulated in a molding material such that at least one surface of the leadframe strip is exposed. The integrated circuit package is singulated from a remainder of the leadframe strip.Type: GrantFiled: September 14, 2012Date of Patent: December 13, 2016Assignee: UTAC HEADQUARTERS PTE. LTD.Inventors: Geraldine Tsui Yee Lin, Walter de Munnik, Kin Pui Kwan, Wing Him Lau, Kwok Cheung Tsang, Chun Ho Fan, Neil McLellan
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Publication number: 20160013075Abstract: A process for fabricating an integrated circuit package includes selectively etching a leadframe strip to define a die attach pad and a plurality of contact pads. At least one side of the die attach pad has a plurality of spaced apart pad portions. A semiconductor die is mounted to the die attach pad and wires are bonded from the semiconductor die to respective ones of the contact pads. A first surface of the leadframe strip, including the semiconductor die and wire bonds, is encapsulated in a molding material such that at least one surface of the leadframe strip is exposed. The integrated circuit package is singulated from a remainder of the leadframe strip.Type: ApplicationFiled: September 14, 2012Publication date: January 14, 2016Inventors: Geraldine Tsui Yee LIN, Walter de MUNNIK, Kin Pui KWAN, Wing Him LAU, Kwok Cheung TSANG, Chun Ho FAN, Neil McLELLAN
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Patent number: 8330270Abstract: An integrated circuit package having a selectively etched leadframe strip defining a die attach pad and a plurality of contact pads, at least one side of the die attach pad having a plurality of spaced apart pad portions; a semiconductor die mounted to the die attach pad and wires bonding the semiconductor die to respective ones of the contact pads; a first surface of the leadframe strip, including the semiconductor die and wire bonds, encapsulated in a molding material such that at least one surface of the leadframe strip is exposed, and wherein solder paste is disposed on said contact pads and said at least one side of said die attach pad.Type: GrantFiled: December 9, 2004Date of Patent: December 11, 2012Assignee: UTAC Hong Kong LimitedInventors: Geraldine Tsui Yee Lin, Walter de Munnik, Kin Pui Kwan, Wing Him Lau, Kwok Cheung Tsang, Chun Ho Fan, Neil McLellan
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Patent number: 7449771Abstract: A method of fabricating an integrated circuit package. The method includes providing a first leadframe and a second leadframe, laminating the second leadframe to a portion of the first leadframe in order to create a multi-layer laminated leadframe, and mounting a semiconductor die on another portion of the first leadframe.Type: GrantFiled: October 9, 2003Date of Patent: November 11, 2008Assignee: ASAT Ltd.Inventors: Chun Ho Fan, Tsui Yee Lin, Kin Pui Kwan, Shui Ming Tse, Wing Him Lau, Shuk Man Wong
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Patent number: 7271032Abstract: A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction for the contact pads, and an interlocking pattern for the die attach pad. After wire bonding and molding, a further etching is performed to isolate and expose contact pads. Singulation of individual chip packages from the leadframe strip is then performed by saw singulation or die punching.Type: GrantFiled: May 6, 2005Date of Patent: September 18, 2007Assignee: ASAT Ltd.Inventors: Neil McLellan, Chun Ho Fan, Kwok Cheung Tsang, Kin Pui Kwan, Wing Him Lau
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Patent number: 7270867Abstract: A process for fabricating a leadless plastic chip carrier includes selectively depositing a plurality of base layers on a first surface of a base of a leadframe strip to at least partially define a die attach pad and at least one row of contact pads. At least one further layer is selectively deposited on portions of the plurality of layers to further define at least the contact pads. The leadframe strip is then treated with a surface preparation. A semiconductor die is mounted to the die attach pad, followed by wire bonding the semiconductor die to at least the contact pads. Molding the semiconductor die, the wire bonds, the die attach pad and the contact pads on the surface of the leadframe strip, in a molding compound follows. The leadframe strip is etched to expose the contact pads and the die attach pad and the leadless plastic chip carrier is singulated from a remainder of the leadframe strip.Type: GrantFiled: December 22, 2004Date of Patent: September 18, 2007Assignee: ASAT Ltd.Inventors: Kin Pui Kwan, Wing Him Lau, Kwok Cheung Tsang, Chun Ho Fan, Neil McLellan
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Patent number: 7247526Abstract: A process for fabricating an integrated circuit package. At least a first side of a leadframe strip is selectively etched to define portions of a die attach pad and at least one row of contacts adjacent the die attach pad. A carrier strip is laminated to the first side of the leadframe strip and a second side of the leadframe strip is selectively etched to thereby define a remainder of the die attach pad and the at least one row of contacts. A semiconductor die is mounted to the die attach pad, on the second side of the leadframe strip and the semiconductor die is wire bonded to ones of the contacts. The second side of the leadframe strip is encapsulating, including the semiconductor die and wire bonds, in a molding material. The carrier strip is removed from the leadframe strip and the integrated circuit package is singulated from a remainder of the leadframe strip.Type: GrantFiled: May 25, 2005Date of Patent: July 24, 2007Assignee: ASAT Ltd.Inventors: Chun Ho Fan, Neil McLellan, Wing Him Lau, Emily Shui Ming Tse
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Patent number: 7226811Abstract: A process for fabricating a leadless plastic chip carrier includes laminating a first metal strip to a second metal strip to form a leadframe strip, selectively etching the first metal strip to define at least a row of contact pads, mounting a semiconductor die to either a die attach pad or the second metal strip and wire bonding the semiconductor die to ones of the contact pads, encapsulating a top surface of the leadframe strip in a molding material, removing the second metal strip, thereby exposing the die attach pad and the at least one row of contact pads, and singulating the leadless plastic chip carrier from the leadframe strip.Type: GrantFiled: July 6, 2005Date of Patent: June 5, 2007Assignee: ASAT Ltd.Inventors: Neil McLellan, Chun Ho Fan, Kin Pui Kwan, Wing Him Lau
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Patent number: 7049177Abstract: A process for fabricating a leadless plastic chip carrier includes selectively etching at least a first surface of a leadframe strip to partially define at least a plurality of contact pads and a die attach pad; selectively plating at least one layer of metal on a second surface of the leadframe strip, on an undersurface of at least the plurality of contact pads and the die attach pad; mounting a semiconductor die on the first surface, on the partially defined die attach pad; wire bonding the semiconductor die to ones of the contact pads; encapsulating the wire bonds and the semiconductor die in a molding material such that the molding material covers a first portion of the die attach pad and first portions of the contact pads; selectively etching a second surface of the leadframe strip to define a second portion of the contact pads and a second portion of the die attach pad by etching the second surface with the at least one layer of metal resisting etching; and singulating the leadless plastic chip carrierType: GrantFiled: January 28, 2004Date of Patent: May 23, 2006Assignee: ASAT Ltd.Inventors: Chun Ho Fan, Wing Him Lau, Kenneth Kwan, Janet Wong
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Patent number: 6995460Abstract: A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction for the contact pads, and an interlocking pattern for the die attach pad. After wire bonding and molding, a further etching is performed to isolate and expose contact pads. Singulation of individual chip packages from the leadframe strip is then performed by saw singulation or die punching.Type: GrantFiled: May 6, 2005Date of Patent: February 7, 2006Assignee: ASAT Ltd.Inventors: Neil McLellan, Chun Ho Fan, Kwok Cheung Tsang, Kin Pui Kwan, Wing Him Lau
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Patent number: 6989294Abstract: A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction for the contact pads, and an interlocking pattern for the die attach pad. After wire bonding and molding, a further etching is performed to isolate and expose contact pads. Singulation of individual chip packages from the leadframe strip is then performed by saw singulation or die punching.Type: GrantFiled: January 28, 2003Date of Patent: January 24, 2006Assignee: ASAT, Ltd.Inventors: Neil McLellan, Chun Ho Fan, Kwok Cheung Tsang, Kin Pui Kwan, Wing Him Lau
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Patent number: 6946324Abstract: A process for fabricating a leadless plastic chip carrier includes laminating a first metal strip to a second metal strip to form a leadframe strip, selectively etching the first metal strip to define at least a row of contact pads, mounting a semiconductor die to either a die attach pad or the second metal strip and wire bonding the semiconductor die to ones of the contact pads, encapsulating a top surface of the leadframe strip in a molding material, removing the second metal strip, thereby exposing the die attach pad and the at least one row of contact pads, and singulating the leadless plastic chip carrier from the leadframe strip.Type: GrantFiled: October 30, 2003Date of Patent: September 20, 2005Assignee: Asat Ltd.Inventors: Neil McLellan, Chun Ho Fan, Kin Pui Kwan, Wing Him Lau
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Patent number: 6933594Abstract: A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction for the contact pads, and an interlocking pattern for the die attach pad. After wire bonding and molding, a further etching is performed to isolate and expose contact pads. Singulation of individual chip packages from the leadframe strip is then performed by saw singulation or die punching.Type: GrantFiled: March 9, 2001Date of Patent: August 23, 2005Assignee: ASAT Ltd.Inventors: Neil McLellan, Chun Ho Fan, Kwok Cheung Tsang, Kin Pui Kwan, Wing Him Lau
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Patent number: 6872661Abstract: A leadless plastic chip carrier has a plurality of die attach pads on which a singulated semi-conductor die is mounted. At least one row of contact pads circumscribes the plurality of die attach pads and a power/ground ring is intermediate the contact pads and the die attach pads. Wire bonds connect the semiconductor die, the contact pads and the power/ground ring. An overmold covers the semi-conductor die, the die attach pads, the power/ground ring and the contact pads such that each of the die attach pads and the contact pads has one exposed surface.Type: GrantFiled: December 13, 2002Date of Patent: March 29, 2005Assignee: ASAT Ltd.Inventors: Kin Pui Kwan, Wing Him Lau, Kwok Cheung Tsang, Chun Ho Fan, Neil McLellan
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Patent number: 6734044Abstract: A method of fabricating an integrated circuit package. The method includes providing a first leadframe and a second leadframe, laminating the second leadframe to a portion of the first leadframe in order to create a multi-layer laminated leadframe, and mounting a semiconductor die on another portion of the first leadframe.Type: GrantFiled: June 10, 2002Date of Patent: May 11, 2004Assignee: ASAT Ltd.Inventors: Chun Ho Fan, Tsui Yee Lin, Kin Pui Kwan, Shui Ming Tse, Wing Him Lau, Shuk Man Wong
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Patent number: 6667191Abstract: An integrated circuit package including a silicon wafer, a plate of intermetallic compound fixed to the back surface of the silicon wafer and a plurality of solder ball contacts. The solder ball contacts are in electrical connection with die circuitry on the front surface of the silicon wafer.Type: GrantFiled: August 5, 2002Date of Patent: December 23, 2003Assignee: Asat Ltd.Inventors: Neil McLellan, Wing Him Lau, Tak Sang Yeung, Onofre A. Rulloda, Jr.
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Patent number: 6635957Abstract: A leadless plastic chip carrier has a plurality of die attach pads on which a singulated semi-conductor die is mounted. At least one row of contact pads circumscribes the plurality of die attach pads and a power/ground ring is intermediate the contact pads and the die attach pads. Wire bonds connect the semiconductor die, the contact pads and the power/ground ring. An overmold covers the semiconductor die, the die attach pads, the power/ground ring and the contact pads such that each of the die attach pads and the contact pads has one exposed surface.Type: GrantFiled: March 9, 2001Date of Patent: October 21, 2003Assignee: ASAT Ltd.Inventors: Kin Pui Kwan, Wing Him Lau, Kwok Cheung Tsang, Chun Ho Fan, Neil Mclellan
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Publication number: 20010014538Abstract: A leadless plastic chip carrier has a plurality of die attach pads on which a singulated semi-conductor die is mounted. At least one row of contact pads circumscribes the plurality of die attach pads and a power/ground ring is intermediate the contact pads and the die attach pads. Wire bonds connect the semiconductor die, the contact pads and the power/ground ring. An overmold covers the semiconductor die, the die attach pads, the power/ground ring and the contact pads such that each of the die attach pads and the contact pads has one exposed surface.Type: ApplicationFiled: March 9, 2001Publication date: August 16, 2001Applicant: ASAT Ltd.Inventors: Kin Pui Kwan, Wing Him Lau, Kwok Cheung Tsang, Chun Ho Fan, Neil Mclellan
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Publication number: 20010008305Abstract: A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction for the contact pads, and an interlocking pattern for the die attach pad. After wire bonding and molding, a further etching is performed to isolate and expose contact pads. Singulation of individual chip packages from the leadframe strip is then performed by saw singulation or die punching.Type: ApplicationFiled: March 9, 2001Publication date: July 19, 2001Applicant: ASAT Ltd.Inventors: Neil McLellan, Chun Ho Fan, Kwok Cheung Tsang, Kin Pui Kwan, Wing Him Lau